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Thermal management device and method for a computer processor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-017/40
출원번호 US-0540714 (1995-10-11)
발명자 / 주소
  • Evoy David Ross
출원인 / 주소
  • VLSI Technology, Inc.
대리인 / 주소
    Hickman, Beyer & Weaver
인용정보 피인용 횟수 : 52  인용 특허 : 6

초록

A thermal management device for controlling the temperature of a computer processor chip, by controlling the operating speed of the processor, including a temperature sensitive circuitry incorporated within a packaged clock chip for connection to a processor. A thermal management method for controll

대표청구항

[ What is claimed is:] [1.] An active thermal management system comprising:a packaged computer processor chip adapted for operating at variable frequency;a separately packaged clock chip having a temperature sensitive circuitry and a clock generator both integrated therein, said temperature sensitiv

이 특허에 인용된 특허 (6)

  1. Katz Neil A. (Parkland FL) Pollitt Richard F. (Highland Beach FL) Suarez Leopoldo L. (Boca Raton FL) Frank C. William (Irvine CA), Battery operated computer operation suspension in response to environmental sensor inputs.
  2. Bailey Joseph A. (Austin TX), Clock control technique and system for a microprocessor including a thermal sensor.
  3. Kenny John D. (Sunnyvale CA) Lei Emilia V. (Union City CA), Heat regulator for integrated circuits.
  4. Broadwater Stuart P. (White Hall MD) Havlik John (Sparks MD), Method and apparatus for sensing thermal stress in integrated circuits.
  5. Anderson Floyd E. (Phoenix AZ) Robb Stephen P. (Tempe AZ) Shaw Pern (Austin TX), Microprocessor having high current drive and feedback for temperature control.
  6. Kikinis Dan (Saratoga CA), Temperature management for integrated circuits.

이 특허를 인용한 특허 (52)

  1. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
  2. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
  3. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
  4. Halepete,Sameer; Anvin,H. Peter; Chen,Zongjian; D'Souza,Godfrey P.; Fleischmann,Marc; Klayman,Keith; Lawrence,Thomas; Read,Andrew, Adaptive power control.
  5. Poornachandran, Rajesh; Aissi, Selim, Adaptive thermal throttling with user configuration capability.
  6. Nobutaka Nishigaki JP, Apparatus for controlling internal heat generating circuit.
  7. Hamann, Hendrik F.; Iyengar, Madhusudan K.; Lacey, James A.; Schmidt, Roger R., Apparatus for thermal characterization under non-uniform heat load.
  8. Hamann, Hendrik F.; Iyengar, Madhusudan K.; Lacey, James A.; Schmidt, Roger R., Apparatus for thermal characterization under non-uniform heat load.
  9. Hamann, Hendrik F.; Iyengar, Madhusudan K.; Lacey, James A.; Schmidt, Roger R., Apparatus for thermal characterization under non-uniform heat load.
  10. Tymchenko, Viktor Andrew, Apparatus, method and computer system for reducing power consumption of a processor or processors upon occurrence of a failure condition affecting the processor or processors.
  11. Beard, Paul, Battery powered device with dynamic power and performance management.
  12. Beard, Paul, Battery powered device with dynamic power and performance management.
  13. Chiang Yung-Hwa,TWX, CPU over-heat protection detection device.
  14. Watts, Jr., La Vaughn F.; Dadzie, Kofi Nkisah; Zhang, Yi, Computer system thermal lap management method and apparatus.
  15. Zhang,Michael T.; Inkley,Benson D.; Li,Peter T.; Ma,Hung Piao; Dinh,James S., Control of voltage regulator thermal condition.
  16. Su,Steven, Cooling fan with built-in adjustable speed.
  17. Prautzsch, Harald, Device and method for determining the temperature of a heat sink.
  18. Schaefer, Harald, Device and method for determining the temperature of a heat sink.
  19. Yakame, Hirotaka; Maruyama, Yuji, Electronic device, power source device, and power control method of electronic device.
  20. Moore, Arden L., Electronics enclosure with redundant thermal sensing architecture.
  21. Moore, Arden L., Electronics enclosure with redundant thermal sensing architecture.
  22. Moore, Arden L., Electronics enclosure with redundant thermal sensing architecture.
  23. Bowden, Scott J.; Douglas, Jonathan P., Failsafe mechanism for preventing an integrated circuit from overheating.
  24. Bowden,Scott J.; Douglas,Jonathan P., Failsafe mechanism for preventing an integrated circuit from overheating.
  25. Hussain M. Abid ; Caliboso Amado ; Huynh Quoi, Independent hardware thermal sensing and monitoring.
  26. Frankel, Donald; Cobb, Joseph; Goertzen, Shawn, Infrared inspection and reporting process.
  27. Nishigaki,Nobutaka; Ninomiya,Ryoji; Sakai,Makoto, Method and apparatus for controlling internal heat generating circuit.
  28. Lewis, Andrew J.; Gross, Kenny C.; McElfresh, David K., Method and apparatus for controlling temperature variations in a computer system.
  29. Watts Vaughn, Method and apparatus for real-time CPU thermal management and power conservation by adjusting CPU clock frequency in acc.
  30. Park, Ki Yeon; Jang, Se Young; Yun, Chul Eun, Method for controlling temperature of terminal and terminal supporting the same.
  31. Klink Erich,DEX ; Schmunkamp Dietmar,DEX ; Weber Helmut,DEX ; Frech Roland,DEX ; Garben Bernd,DEX ; Harrer Hubert,DEX, Method for reducing a transient thermal mismatch.
  32. Gunther, Stephen H.; Binns, Frank; Pippin, Jack D.; Rankin, Linda J.; Burton, Edward A.; Carmean, Douglas M.; Bauer, John M., Methods and apparatus for thermal management of an integrated circuit die.
  33. Gunther,Stephen H.; Binns,Frank; Pippin,Jack D.; Rankin,Linda J.; Burton,Edward A.; Carmean,Douglas M.; Bauer,John M., Methods and apparatus for thermal management of an integrated circuit die.
  34. Poisner, David I., Over-clocking detection system utilizing a reference signal and thereafter preventing over-clocking by reducing clock rate.
  35. Cathey David A., Portable computer with selectively operable cooling unit.
  36. Ku,Joesph W., Power management using a pre-determined thermal characteristic of a memory module.
  37. Fleischmann, Marc; Anvin, H. Peter, Restoring processor context in response to processor power-up.
  38. Read, Andrew; Halepete, Sameer; Klayman, Keith, Saving power when in or transitioning to a static mode of a processor.
  39. Read,Andrew; Halepete,Sameer; Klayman,Keith, Saving power when in or transitioning to a static mode of a processor.
  40. Read, Andrew; Halepete, Sameer; Klayman, Keith, Saving power when in or transitioning to a static mode of a processor by using feedback-configured voltage regulator.
  41. Michail Michel Salib ; Pricer Wilbur David ; Ventrone Sebastian Theodore, Self regulating temperature/performance/voltage scheme for micros (X86).
  42. Michail Michel Salib ; Pricer Wilbur David ; Ventrone Sebastian Theodore, Self regulating temperature/performance/voltage scheme for micros (X86).
  43. Fleischmann, Marc; Anvin, H. Peter, System and method for saving and restoring a processor state without executing any instructions from a first instruction set.
  44. Poisner, David L., System for detecting over-clocking uses a reference signal thereafter preventing over-clocking by reducing clock rate.
  45. Tressler, Chris; Chen, Mary, System for suspending operation of a switching regulator circuit in a power supply if the temperature of the switching regulator is too high.
  46. Okada,Atsuhiko; Wada,Hideaki; Watanabe,Mitsuaki; Iwai,Hajime; Tabata,Hirosuke; Kazuma,Shingo, Temperature controlled semiconductor circuit.
  47. Cohen, Mark Evan, Thermal management of a laptop computer.
  48. Nagaraj Ravi, Thermal sensing of multiple integrated circuits.
  49. Ang Michael Anthony, Thermostat controls dsp's temperature by effectuating the dsp switching between tasks of different compute-intensity.
  50. Read, Andrew; Halepete, Sameer; Klayman, Keith, Transitioning to and from a sleep state of a processor.
  51. Jenoe Tihanyi DE; Horst Schafer DE, VLSI circuit with temperature monitoring.
  52. Helms, Frank P.; Brinkley, Jeffrey A., Variable maximum die temperature based on performance state.
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