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Semiconductor device and bonding pad structure therefor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
  • H01L-023/52
  • H01L-023/40
출원번호 US-0479205 (1995-06-07)
우선권정보 JP-0019212 (1995-02-07)
발명자 / 주소
  • Fujiki Noriaki,JPX
  • Yamashita Takashi,JPX
출원인 / 주소
  • Mitsubishi Denki Kabushiki Kaisha, JPX
대리인 / 주소
    Lowe, Price, LeBlanc & Becker
인용정보 피인용 횟수 : 99  인용 특허 : 5

초록

The bonding pad structure is so arranged that an area of the first wiring layer area is smaller than that of the second wiring layer or the first wiring layer is formed outside a bonding region of the second wiring layer under the second wiring layer.

대표청구항

[ What is claimed is:] [1.] A semiconductor device having a bonding pad portion of a multilayered wiring structure comprising at least first and second wiring layers and at least one interlayer insulating layer between the wiring layers which has a plurality of via holes filled with an electrically

이 특허에 인용된 특허 (5)

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  5. Yoshizaki Thutomu (Kawasaki JPX), Semiconductor chip for mounting on a semiconductor package substrate by a flip-clip process.

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