초록 ▼

A method for forming interconnections for semiconductor fabrication and semiconductor devices have such interconnections are described. A first patterned dielectric layer is formed over a semiconductor substrate and has a first opening filed with conductive material. Another patterned dielectric lay

A method for forming interconnections for semiconductor fabrication and semiconductor devices have such interconnections are described. A first patterned dielectric layer is formed over a semiconductor substrate and has a first opening filed with conductive material. Another patterned dielectric layer is formed over the first dielectric layer and has a second opening over at least a portion of the conductive material. The first patterned dielectric layer may serve as an etch-stop in patterning the other patterned dielectric layer. Also, a dielectric etch-stop layer may be formed over the first patterned dielectric layer and over the conductive material before the other patterned dielectric layer has been formed. This dielectric etch-stop layer may serve as an etch-stop in patterning the other patterned dielectric layer. The second opening exposes a portion of the dielectric etch-stop layer. The exposed portion of the dielectric etch-stop layer is removed. The second opening is filled with conductive material.

대표청구항 ▼

[ What is claimed is:] [1.] A semiconductor device comprising:(a) a semiconductor substrate;(b) a first patterned dielectric layer disposed over the semiconductor substrate, the first patterned dielectric layer having a first dielectric material and having a first opening filled with first conductiv

[ What is claimed is:] [1.] A semiconductor device comprising:(a) a semiconductor substrate;(b) a first patterned dielectric layer disposed over the semiconductor substrate, the first patterned dielectric layer having a first dielectric material and having a first opening filled with first conductive material, the first conductive material being adjacent to and in direct contact with the dielectric layer;(c) a second patterned dielectric layer disposed over the first patterned dielectric layer, the second patterned dielectric layer having a second dielectric material and having a second opening; and(d) a third patterned dielectric layer disposed over the second patterned dielectric layer, the third patterned dielectric layer having a third dielectric material and having a third opening over the second opening and over at least a portion of the first conductive material, wherein the bottom of the third opening is approximately equal in width and aligned to the second opening;wherein the second opening and the third opening are filled with second conductive material over at least a portion of the first conductive material.