초록 ▼

A process for producing a wafer comprising depositing a pad oxide layer, depositing a silicon nitride layer, patterning and etching the silicon nitride to expose the wafer and define masking stacks, forming field oxide isolation regions in the exposed regions and then removing the masking stack in s

A process for producing a wafer comprising depositing a pad oxide layer, depositing a silicon nitride layer, patterning and etching the silicon nitride to expose the wafer and define masking stacks, forming field oxide isolation regions in the exposed regions and then removing the masking stack in such a way that reduction in the thickness of the field isolation regions are minimized. In particular, in one implementation, the cap oxide on the top of the masking stack is removed through chemical mechanical polishing (CMP). In another implementation, a sacrificial passivation layer, such as silicon dioxide or polysilicon, is deposited over the field isolation regions and the masking stacks. The sacrificial passivation layer and the cap oxide on the upper surface of the masking stacks are then removed through either CMP or selective etching. With the passivation layer, the field isolation regions are protected against diminishment during subsequent etching of the cap oxide which permits the field isolation region to be initially grown to their desired thickness. This results is less bird's beak encroachment and problems associated therewith as the field isolation regions need not be as thick initially. The sacrificial passivation layer can then be removed, subsequent to removal of the masking stack by growing a sacrificial layer which either absorbs the passivation layer, or does not significantly increase its thickness, and then etching the sacrificial layer to expose the underlying wafer and isolation regions.

대표청구항 ▼

[ What is claimed:] [44.] A method of producing a wafer having a plurality of isolation regions, said method comprising the steps of:positioning a masking material of a first type of material on a first surface of said wafer;selectively removing portions of said masking material to expose regions of

[ What is claimed:] [44.] A method of producing a wafer having a plurality of isolation regions, said method comprising the steps of:positioning a masking material of a first type of material on a first surface of said wafer;selectively removing portions of said masking material to expose regions of said first surface of said wafer and to define a plurality of masking stacks having side walls and an upper surface;forming isolation regions in said exposed regions of said first surface of said wafer, wherein said isolation regions have a first thickness;positioning an oxidizable sacrificial passivation layer of a second type of material over said isolation regions;selectively removing only an upper portion of said masking stacks without reducing said first thickness of said isolation regions;removing said masking material remaining after said selectively removing step wherein said first type of masking material and said second type of passivation material are selected so that said sacrificial passivation layer remains over said isolation regions following said step of removing said masking material;performing an oxidation step to transform said material of said second type into an sacrificial oxide layer; andremoving said sacrificial oxide layer so that said isolation regions are exposed, wherein said isolation regions have a thickness substantially equal to said first thickness after said removing step.