[특허]Ink jet print head identification circuit with programmed transistor array

Ink jet print head identification circuit with programmed transistor array 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	B41J-029/393 B41J-002/14 B41J-002/16
출원번호	US-0534676 (1995-09-27)
발명자 / 주소	Gibson Bruce David Parish George Keith
출원인 / 주소	Lexmark International, Inc.
대리인 / 주소	McArdle, Jr.
인용정보	피인용 횟수 : 45 인용 특허 : 0

초록 ▼

An ink jet print head identification system for providing print head identifying information to the electronics of an ink jet printer includes one or more programmable drain transistors integrated onto a print head chip. Existing address lines that interconnect the printer electronics and print head electronics are used to serially read the digital contents of each programmed transistor. The printer electronics reads each bit by combinationally applying a pull up voltage on two of the address lines while pulling down the voltage on one address line. If the drain of the transistor being read is programmed as an electrically conducting short, then the transistor will turn on and the voltage level on one of the pulled up address lines will not reach a logic high. If the drain is programmed as a non-conducting gap, the transistor will not conduct and the voltage level on both pulled up lines reach a logic high. The printer electronics detects whether the voltage level on both lines is a logic high and accordingly determines the digital contents of the identification circuit. After each bit has been read, the printer electronics determines print head identifying information based on the bit pattern that was retrieved from the identification circuit.

대표청구항 ▼

[ What is claimed is:] [1.] An identification system for providing ink jet print head identifying information in ink jet printers having ink jet print heads, comprising:a plurality of address lines, including a first, second and third address line, for transmitting signals including voltages;a supply circuit for applying a pull up voltage on said first and second address line;an electronic switch having a gate connected to the first address line for turning on the switch when said supply circuit applies the pull up voltage to the first address line;said third address line being in series connection with the second address line when said switch is on and providing a return for current flowing through the second address line;a programmed identification circuit connected to the first, second, and third address line;said identification circuit either preventing the second address line from reaching a logic high voltage level when said supply circuit pulls up the voltage on the first and second address line if said identification circuit is programmed with a first content, or allowing the second address line to reach a logic high voltage level when said supply circuit pulls up the voltage on the first and second address line if said identification circuit is programmed with a second bit; anda detector connected to the second address line for detecting whether the identification circuit is programmed with the first bit or the second bit by determining whether the voltage level on the second address line is a logic high or a logic low.

이 특허를 인용한 특허 (45)

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
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저장형식	Text(ASCII format) Excel format PIAS분석(.xls)
메일정보	받는사람 (필수) @ 보내는사람 (선택) @ 제목 내용 KISTI 검색결과 이메일 서비스
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연합인증

Ink jet print head identification circuit with programmed transistor array 원문보기

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Ink jet print head identification circuit with programmed transistor array 원문보기

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연구과제 타임라인

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이 특허를 인용한 특허 (45)

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