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Thermal post-deposition treatment of halogen-doped films to improve film stability and reduce halogen migration to inter 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B05D-003/02
  • B05D-001/36
  • H05H-001/24
출원번호 US-0646862 (1996-05-08)
발명자 / 주소
  • Guo Ted
  • Cohen Barney M.
  • Verma Amrita
출원인 / 주소
  • Applied Materials, Inc.
대리인 / 주소
    Townsend and Townsend and Crew LLP
인용정보 피인용 횟수 : 36  인용 특허 : 10

초록 ▼

A method of stabilizing a halogen-doped silicon oxide film to reduce halogen atoms migrating from said film during subsequent processing steps. A halogen-doped film is deposited over a substrate and then subjected to a degassing step in which the film is briefly heated to a temperature of between ab

대표청구항 ▼

[ What is claimed is:] [1.] A method for stabilizing a fluorosilicate glass layer deposited over a substrate, said method comprising the steps of:heating said substrate to a temperature of between 300.degree. to 550.degree. C. for a period of between 30 and 120 seconds after said fluorosilicate glas

이 특허에 인용된 특허 (10)

  1. Chang Chorng-Ping (Berkeley Heights NJ) Flamm Daniel L. (Chatham Township ; Morris County NJ) Ibbotson Dale E. (Westfield NJ) Mucha John A. (Madison NJ), Devices and process for producing devices containing silicon nitride films.
    상세보기
  2. Haluska Loren A. (Midland MI), Hermetic coatings by heating hydrogen silsesquinoxane resin in an inert atmosphere.
    상세보기
  3. Otsubo Toru (Fujisawa JPX) Yamaguchi Yasuhiro (Chigasaki JPX), Insulating film forming method for semiconductor device interconnection.
    상세보기
  4. Okano Haruo (Tokyo JPX) Noguchi Sadahisa (Fuchu JPX) Sekine Makoto (Yokohama JPX), Method for forming a film on a substrate by activating a reactive gas.
    상세보기
  5. Homma Tetsuya (Tokyo JPX), Method for forming interconnect structure, insulating films and surface protective films of semiconductor device.
    상세보기
  6. Homma Tetsuya (Tokyo JPX), Method for manufacturing semiconductor device.
    상세보기
  7. Tabasky Marvin J. (Peabody MA) Tweed Bruce (Pelham NH), Method of depositing fluorinated silicon nitride.
    상세보기
  8. Nguyen Son V. (Williston VT) Dobuzinsky David M. (Essex Junction VT) Dopp Douglas J. (Hopewell Junction NY) Harmon David L. (Essex Junction VT), Plasma enhanced CVD process for fluorinated silicon nitride films.
    상세보기
  9. Homma Tetsuya (Tokyo JPX), Process for producing semiconductor devices.
    상세보기
  10. Hirata Masahiro (osaka JPX) Misonou Masao (Hyog JPX) Kawahara Hideo (Osaka JPX), Production of a transparent electric conductor.
    상세보기

이 특허를 인용한 특허 (36)

  1. Dian Sugiarto ; Judy Huang ; David Cheung, Apparatus for depositing high deposition rate halogen-doped silicon oxide layer.
    상세보기
  2. Ravi Kramadhati V. ; Orczyk Maciek, Apparatus for the stabilization of halogen-doped films through the use of multiple sealing layers.
    상세보기
  3. Abdelgadir, Mahjoub Ali; Layadi, Nace; Merchant, Sailesh Mansinh; Saxena, Vivek; Yih, Pei H., Diffusion preventing barrier layer in integrated circuit inter-metal layer dielectrics.
    상세보기
  4. Coolbaugh, Douglas D.; Downes, Keith E.; Lindgren, Peter J.; Stamper, Anthony K., Dual-damascene process to fabricate thick wire structure.
    상세보기
  5. Coolbaugh, Douglas D.; Downes, Keith E.; Lindgren, Peter J.; Stamper, Anthony K., Dual-damascene process to fabricate thick wire structure.
    상세보기
  6. Coolbaugh, Douglas D.; Downes, Keith E.; Lindgren, Peter J.; Stamper, Anthony K., Dual-damascene process to fabricate thick wire structure.
    상세보기
  7. Jang Syun-Ming,TWX, Forming halogen doped glass dielectric layer with enhanced stability.
    상세보기
  8. Aug Arthur Khoon Siah,SGX ; Chen Feng,SGX ; Li Qiong,SGX, IMD scheme by post-plasma treatment of FSG and TEOS oxide capping layer.
    상세보기
  9. Richard J. Huang, Integration of low-k SiOF for damascene structure.
    상세보기
  10. Tian, Jason; Zhu, Wenxian; Karim, M. Ziaul; Do, Cong, Low dielectric constant fluorine-doped silica glass film for use in integrated circuit chips and method of forming the same.
    상세보기
  11. Jang Syun-Ming,TWX, Method for forming a stabilized fluorosilicate glass layer.
    상세보기
  12. Shue, Shau-Lin; Wang, Mei-Yun, Method for forming incompletely landed via with attenuated contact resistance.
    상세보기
  13. Gardner Mark I. ; Kadosh Daniel, Method of fabricating a semiconductor device having fluorine bearing oxide between conductive lines.
    상세보기
  14. Lin, Chin Hsiang; Liu, Chih Chien, Method of fabricating the stacked structure and damascene process.
    상세보기
  15. Michael J. Hart ; James Karp, Method of improved bondability when using fluorinated silicon glass.
    상세보기
  16. Murali Narasimhan ; Vikram Pavate ; Kenny King-Tai Ngan ; Xiangbing Li, Method of improving adhesion of diffusion layers on fluorinated silicon dioxide.
    상세보기
  17. Yu Chen-Hua,TWX ; Jang Syun-Ming,TWX ; Chang Weng,TWX ; Cheng Yao-Yi,TWX, Method of optimizing device performance via use of copper damascene structures, and HSQ/FSG, hybrid low dielectric constant materials.
    상세보기
  18. Jang Syun-Ming,TWX ; Jeng Shwangming,TWX ; Chang Weng,TWX, Method of protecting a low-K dielectric material.
    상세보기
  19. Chen Feng,SGX ; Teo Rick,SGX ; Chan Lap, Method to reduce dishing in metal chemical-mechanical polishing.
    상세보기
  20. Ellie Yieh ; Li-Qun Xia ; Srinivas Nemani, Methods and apparatus for shallow trench isolation.
    상세보기
  21. Annapragada Rao V., Methods for making reliable via structures having hydrophobic inner wall surfaces.
    상세보기
  22. Lai Jane-Bai,TWX ; Liu Chung-Shi,TWX ; Bao Tien-I,TWX ; Jang Syun-Ming,TWX ; Chang Chung-Long,TWX ; Wang Hui-Ling,TWX ; Wu Szu-An,TWX ; Cheng Wen-Kung,TWX ; Tsan Chun-Ching,TWX ; Wang Ying-Lang,TWX, Methods to improve copper-fluorinated silica glass interconnects.
    상세보기
  23. Yao, Xiang Yu, Mixed frequency RF generator coupled to the gas distribution system.
    상세보기
  24. Annapragada Rao V. ; Dunton Samuel Vance ; Weling Milind Ganesh ; Bothra Subhas, Moisture repellant integrated circuit dielectric material combination.
    상세보기
  25. Yokoyama Takashi,JPX ; Yamada Yoshiaki,JPX ; Kishimoto Koji,JPX, Multilevel interconnecting structure in semiconductor device and method of forming the same.
    상세보기
  26. Hu, Yongjun Jeff; Meldrim, John Mark; Mou, Shanming; McTeer, Everett Allen, Ohmic contacts for semiconductor structures.
    상세보기
  27. Arami, Junichi; Okazaki, Kenji, Plasma etching apparatus.
    상세보기
  28. Ang Arthur,SGX ; Yi Xu,SGX, Post treatment of via opening by N-containing plasma or H-containing plasma for elimination of fluorine species in the FSG near the surfaces of the via opening.
    상세보기
  29. Sugiarto Dian ; Huang Judy ; Cheung David, Process for depositing high deposition rate halogen-doped silicon oxide layer.
    상세보기
  30. Annapragada, Rao V., Reliable via structures having hydrophobic inner wall surfaces.
    상세보기
  31. Pramanick Shekhar, Semiconductor interconnect barrier for fluorinated dielectrics.
    상세보기
  32. Laxman Murugesh ; Maciek Orczyk ; Pravin Narawankar ; Jianmin Qiao ; Turgut Sahin, Sequential in-situ heating and deposition of halogen-doped silicon oxide.
    상세보기
  33. Murugesh Laxman ; Orczyk Maciek ; Narawankar Pravin ; Qiao Jianmin ; Sahin Turgut, Sequential in-situ heating and deposition of halogen-doped silicon oxide.
    상세보기
  34. Lin, Chin-Hsiang; Liu, Chih-Chien, Stacked structure for forming damascene structure.
    상세보기
  35. Jingang Su ; Gongda Yao ; Zhang Xu ; Fusen Chen, Tailoring of a wetting/barrier layer to reduce electromigration in an aluminum interconnect.
    상세보기
  36. Guo Ted ; Cohen Barney M. ; Verma Amrita, Thermal post-deposition treatment of halogen-doped films to improve film stability and reduce halogen migration to interconnect layers.
    상세보기

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