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Microprocessor with a large cache shared by redundant CPUs for increasing manufacturing yield

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/00
출원번호 US-0564721 (1995-11-29)
발명자 / 주소
  • Blomgren James S.
출원인 / 주소
  • S3 Incorporated
대리인 / 주소
    Auvinen
인용정보 피인용 횟수 : 121  인용 특허 : 0

초록

Manufacturing yield is increased and cost lowered when a second, substantially identical CPU core is placed on a microprocessor die when the die contains a large cache. The large cache is shared among the two CPU cores. When one CPU core is defective, the large cache memory may be used by the other

대표청구항

[ I claim:] [1.] A method of manufacturing microprocessors comprising:fabricating on a wafer a plurality of dual-processor die, each dual-processor die having a first CPU core, a second CPU core, a shared memory, and a plurality of bonding pads;(a) making temporary electrical contact with the plural

이 특허를 인용한 특허 (121)

  1. Abraham, Vineet M.; Chin, Bill Ying; Mahoney, William R.; Saxena, Aditya; Liang, Xupei; Zhou, Bill Jianqiang, Achieving ultra-high availability using a single CPU.
  2. Zhou, Bill Jianqiang; Mahoney, William R., Biasing active-standby determination.
  3. Ravi Kumar Arimilli ; Lakshminarayana Baba Arimilli ; Leo James Clark ; John Steven Dodson ; Guy Lynn Guthrie ; James Stephen Fields, Jr., Cache allocation policy based on speculative request history.
  4. Silverbrook, Kia, Camera system comprising color display and processor for decoding data blocks in printed coding pattern.
  5. Silverbrook, Kia, Camera system comprising color display and processor for decoding data blocks in printed coding pattern.
  6. Silverbrook, Kia; Lapstun, Paul, Camera system to facilitate a cascade of imaging effects.
  7. Silverbrook, Kia, Camera system with color display and processor for Reed-Solomon decoding.
  8. Silverbrook, Kia, Camera system with color display and processor for reed-solomon decoding.
  9. Silverbrook, Kia; Walmsley, Simon Robert, Camera unit incorporating program script scanner.
  10. Silverbrook, Kia, Camera with linked parallel processor cores.
  11. Silverbrook, Kia, Camera with linked parallel processor cores.
  12. Silverbrook, Kia, Central processor with multiple programmable processor units.
  13. Silverbrook, Kia, Central processor with multiple programmable processor units.
  14. Cheong Kwang Yung,KRX ; Lee Ann Seong,KRX ; Kim Jae Young,KRX, Control system and method for semiconductor integrated circuit test process.
  15. Cheung, David; Kancherla, Mani Prasad; Kothari, Deepak; Hemminger, Gary, Core-trunking across cores on physically separated processors allocated to a virtual machine based on configuration information including context information for virtual machines.
  16. Morrison, John M.; Sanzio, Joseph, Data integrity device providing heightened error protection in a data processing system.
  17. Silverbrook, Kia, Digital camera having image processor and printer.
  18. Silverbrook, Kia, Digital camera having image processor and printer.
  19. Silverbrook, Kia, Digital camera with quad core processor.
  20. Silverbrook, Kia, Digital camera with quad core processor.
  21. Silverbrook, Kia, Disposable digital camera with printing assembly.
  22. Silverbrook, Kia, Disposable digital camera with printing assembly.
  23. Silverbrook, Kia, Disposable digital camera with printing assembly.
  24. Michael R. Magee ; Michael D. Beer ; Wesley R. Erck, Efficient database for die-per-wafer computations.
  25. Ravi Kumar Arimilli ; Lakshminarayana Baba Arimilli ; Leo James Clark ; John Steven Dodson ; Guy Lynn Guthrie ; James Stephen Fields, Jr., Extended cache state with prefetched stream ID information.
  26. Silverbrook, Kia, Hand held image capture device with multi-core processor and wireless interface to input device.
  27. Silverbrook, Kia, Hand held image capture device with multi-core processor for facial detection.
  28. Silverbrook, Kia, Hand held image capture device with multi-core processor for facial detection.
  29. Silverbrook, Kia, Hand-held quad core processing apparatus.
  30. Silverbrook, Kia, Hand-held quad core processing apparatus.
  31. Silverbrook, Kia, Handheld digital camera device with orientation sensing and decoding capabilities.
  32. Silverbrook, Kia, Handheld imaging device incorporating multi-core image processor.
  33. Silverbrook, Kia, Handheld imaging device with VLIW image processor.
  34. Silverbrook, Kia, Handheld imaging device with image processor provided with multiple parallel processing units.
  35. Silverbrook, Kia, Handheld imaging device with integrated chip incorporating on shared wafer image processor and central processor.
  36. Silverbrook, Kia, Handheld imaging device with multi-core image processor integrating common bus interface and dedicated image sensor interface.
  37. Silverbrook, Kia, Handheld imaging device with multi-core image processor integrating common bus interface and dedicated image sensor interface.
  38. Silverbrook, Kia, Handheld imaging device with multi-core image processor integrating common bus interface and dedicated image sensor interface.
  39. Silverbrook, Kia, Handheld imaging device with multi-core image processor integrating common bus interface and dedicated image sensor interface.
  40. Silverbrook, Kia, Handheld imaging device with multi-core image processor integrating image sensor interface.
  41. Silverbrook, Kia, Handheld imaging device with quad-core image processor integrating image sensor interface.
  42. Silverbrook, Kia, Handheld imaging device with system-on-chip microcontroller incorporating on shared wafer image processor and image sensor.
  43. Silverbrook, Kia, Image capture and processing integrated circuit for a camera.
  44. Silverbrook, Kia, Image capture and processing integrated circuit for a camera.
  45. Silverbrook, Kia, Image capture device with linked multi-core processor and orientation sensor.
  46. Silverbrook, Kia, Image processing method using sensed eye position.
  47. Silverbrook, Kia, Image sensing and printing device.
  48. Silverbrook, Kia, Image sensing and printing device.
  49. Silverbrook, Kia, Image sensing and printing device.
  50. Ravi Kumar Arimilli ; Lakshminarayana Baba Arimilli ; Leo James Clark ; John Steven Dodson ; Guy Lynn Guthrie ; James Stephen Fields, Jr., Layered speculative request unit with instruction optimized and storage hierarchy optimized partitions.
  51. Akerman, Bengt J.; Deherrera, Mark F.; Engel, Bradley N.; Rizzo, Nicholas D., MRAM element and methods for writing the MRAM element.
  52. Engel,Bradley N.; Rizzo,Nicholas D.; Deherrera,Mark F.; Janesky,Jason Allen; Savtchenko, deceased,Leonid, Magneto resistance random access memory element.
  53. Janesky, Jason A.; Engel, Bradley N.; Slaughter, Jon M., Magnetoresistive random access memory with reduced switching field variation.
  54. Arimilli, Ravi Kumar; Arimilli, Lakshminarayana Baba; Clark, Leo James; Dodson, John Steven; Guthrie, Guy Lynn; Fields, Jr., James Stephen, Mechanism for high performance transfer of speculative request data between levels of cache hierarchy.
  55. Robert L. Noonan, Method and apparatus for efficient tracking of bus coherency by using a single coherency tag bank.
  56. Bigbee, Bryant E.; Kaushik, Shivnandan; Crossland, James B., Method and apparatus for functional redundancy check mode recovery.
  57. Vaidyanathan,Basu, Method and apparatus for managing processors in a multi-processor data processing system.
  58. Ravi Kumar Arimilli ; Lakshminarayana Baba Arimilli ; Leo James Clark ; John Steven Dodson ; Guy Lynn Guthrie ; James Stephen Fields, Jr., Method for instruction extensions for a tightly coupled speculative request unit.
  59. Moresco Larry L., Method for optimizing cost of manufacturing memory arrays.
  60. Jouppi, Norman Paul, Method of forming a packaged chip multiprocessor.
  61. Orton, Trevor; Turnbull, William; Kauzunovich, Sergei, Microcontroller network diagnostic system.
  62. Silverbrook, Kia; Lapstun, Paul; Walmsley, Simon Robert, Modular camera and printer.
  63. Jouppi, Norman Paul, Modular three-dimensional chip multiprocessor.
  64. Silverbrook, Kia, Multi-core image processor for portable device.
  65. Silverbrook, Kia, Multi-core image processor for portable device.
  66. Silverbrook, Kia, Multi-core processor for hand-held, image capture device.
  67. Silverbrook, Kia, Multi-core processor for portable device with dual image sensors.
  68. Silverbrook, Kia, Multi-core processor for portable device with dual image sensors.
  69. Slaughter,Jon M.; Korkin, legal representative,Anatoli A.; Goronkin,Herbert; Savtchenko,Leonid, Multi-state magnetoresistance random access cell with improved memory storage density.
  70. Pudiyapura, Ajeer Salil, Multicast route cache system.
  71. Ravi Kumar Arimilli ; Lakshminarayana Baba Arimilli ; Leo James Clark ; John Steven Dodson ; Guy Lynn Guthrie ; James Stephen Fields, Jr., Optimized cache allocation algorithm for multiple speculative requests.
  72. Chin, Bill Ying; Ratner, Ilya; Desai, Tushar; Madineni, Surendranadh; Mahoney, William R., Persisting data across warm boots.
  73. Silverbrook, Kia, Portable device with dual image sensors and quad-core processor.
  74. Silverbrook, Kia, Portable device with dual image sensors and quad-core processor.
  75. Silverbrook, Kia, Portable device with image sensor and quad-core processor for multi-point focus image capture.
  76. Silverbrook, Kia, Portable device with image sensor and quad-core processor for multi-point focus image capture.
  77. Silverbrook, Kia, Portable device with image sensors and multi-core processor.
  78. Silverbrook, Kia, Portable device with image sensors and multi-core processor.
  79. Silverbrook, Kia, Portable device with image sensors and multi-core processor.
  80. Silverbrook, Kia; Lapstun, Paul, Portable hand-held device for deblurring sensed images.
  81. Silverbrook, Kia, Portable hand-held device for displaying oriented images.
  82. Silverbrook, Kia, Portable hand-held device for displaying oriented images.
  83. Silverbrook, Kia, Portable hand-held device for displaying oriented images.
  84. Silverbrook, Kia; Lapstun, Paul, Portable hand-held device for manipulating images.
  85. Silverbrook, Kia, Portable hand-held device having networked quad core processor.
  86. Silverbrook, Kia, Portable hand-held device having quad core image processor.
  87. Silverbrook, Kia, Portable hand-held device having quad core image processor.
  88. Silverbrook, Kia, Portable hand-held device having quad core image processor.
  89. Silverbrook, Kia, Portable hand-held device having stereoscopic image camera.
  90. Silverbrook, Kia, Portable hand-held device having stereoscopic image camera.
  91. Silverbrook, Kia, Portable hand-held device having stereoscopic image camera.
  92. Silverbrook, Kia, Portable handheld device with multi-core image processor.
  93. Silverbrook, Kia, Portable handheld device with multi-core image processor.
  94. Silverbrook, Kia, Portable handheld device with multi-core image processor.
  95. Silverbrook, Kia, Portable handheld device with multi-core image processor.
  96. Silverbrook, Kia, Portable handheld device with multi-core image processor.
  97. Silverbrook, Kia, Portable handheld device with multi-core image processor.
  98. Silverbrook, Kia, Portable handheld device with multi-core microcoded image processor.
  99. Silverbrook, Kia, Portable handheld device with multi-core microcoded image processor.
  100. Silverbrook, Kia, Portable imaging device with multi-core processor.
  101. Silverbrook, Kia, Portable imaging device with multi-core processor.
  102. Silverbrook, Kia, Portable imaging device with multi-core processor and orientation sensor.
  103. King, Tobin Allen; Silverbrook, Kia, Print media cartridge with ink supply manifold.
  104. Jouppi, Norman Paul, Processing a memory request in a chip multiprocessor having a stacked arrangement.
  105. Silverbrook, Kia, Quad-core camera processor.
  106. Silverbrook, Kia, Quad-core image processor.
  107. Silverbrook, Kia, Quad-core image processor.
  108. Silverbrook, Kia, Quad-core image processor.
  109. Silverbrook, Kia, Quad-core image processor for device with image display.
  110. Silverbrook, Kia, Quad-core image processor for facial detection.
  111. Rizzo,Nicholas D.; Dave,Renu W.; Engel,Bradley N.; Janesky,Jason A.; Sun,JiJun, Reduced power magnetoresistive random access memory elements.
  112. Chin, Bill Ying; Retter, Dan N.; Mahajan, Mayur; Ponnavaikko, Poongovan, Role based multicast messaging infrastructure.
  113. Chin, Bill Ying; Retter, Dan N.; Mahajan, Mayur; Ponnavaikko, Poongovan, Role based multicast messaging infrastructure.
  114. Takehiro Hashimoto JP; Yutaka Tanaka JP; Tetsuya Asami JP; Youichi Satou JP; Noriaki Okumiya JP, SRAM-based semiconductor integrated circuit testing element.
  115. Hashimoto Takehiro,JPX ; Tanaka Yutaka,JPX ; Asami Tetsuya,JPX ; Satou Youichi,JPX ; Okumiya Noriaki,JPX, Semiconductor integrated circuit device, method of estimating failure ratio of such devices on the market, and method of manufacturing the devices.
  116. Morrison, John M., Shared cache for data integrity operations.
  117. Dao Tuan Q. ; Steiss Donald E., Shared floating-point unit in a single chip multiprocessor.
  118. Dholakia, Mehul; Yeung, Wing-Keung Adam; Pudiyapura, Ajeer S., Synchronization of multicast information using incremental updates.
  119. Dholakia, Mehul; Yeung, Wing-Keung Adam; Pudiyapura, Ajeer S., Synchronizing multicast information for linecards.
  120. Dong, Fei; Gong, Shu; Li, Hai Long; Lv, Yin Peng; Wang, Liu Di, Test method and test apparatus for testing a plurality of blocks in a circuit.
  121. Arimilli, Ravi Kumar; Arimilli, Lakshminarayana Baba; Clark, Leo James; Dodson, John Steven; Guthrie, Guy Lynn; Fields, Jr., James Stephen, Time based mechanism for cached speculative data deallocation.
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