초록 ▼

A computing system includes a pair of central processor units structured to operate in substantial synchronism to each execute the same instruction at substantially the same moment in time of identical instruction streams to achieve a logical central processor unit with fail-functional operation. On

A computing system includes a pair of central processor units structured to operate in substantial synchronism to each execute the same instruction at substantially the same moment in time of identical instruction streams to achieve a logical central processor unit with fail-functional operation. One of the central processor units includes a pair of processors that execute, instruction by instruction, the instruction stream with checking for fail-fast operation. The other central processor unit includes only a single processor element. The system achieves a low cost fail-functional architecture.

대표청구항 ▼

[ What is claimed is:] [1.] A fault tolerant processing system, comprising:a first central processing unit comprising a pair of first processor devices operating to execute each instruction of an instruction stream at substantially the same moment in time;a second central processing unit comprising

[ What is claimed is:] [1.] A fault tolerant processing system, comprising:a first central processing unit comprising a pair of first processor devices operating to execute each instruction of an instruction stream at substantially the same moment in time;a second central processing unit comprising a second processor device operating to execute each instruction of substantially an identical copy of the instruction stream, the pair of first processor devices and the second processor device executing identical instructions of the instruction stream and the identical copy of the instruction stream at substantially the same moment in time;whereby the first and second central processing units operate in synchronism to perform substantially the same operations at substantially the same moments in time, including providing output data; anda data checking element connected to receive and compare the output data from the first and second central processing units, and selectively outputting the output data from the first or the second central processing unit; wherein said first and second central processing units operate in error-checking redundancy, duplexed pair.