초록 ▼

A gated electron-emitter is fabricated by a process in which particles (26) are deposited over an insulating layer (24). Gate material is provided over the insulating layer in the space between the particles after which the particles and any overlying material are removed. The remaining gate materia

A gated electron-emitter is fabricated by a process in which particles (26) are deposited over an insulating layer (24). Gate material is provided over the insulating layer in the space between the particles after which the particles and any overlying material are removed. The remaining gate material forms a gate layer (28A or 48A) through which gate openings (30 or 50) extend at the locations of the removed particles. When the gate material deposition is performed so that part of the gate material extends into the spaces below the particles, the gate openings are beveled. The insulating layer is etched through the gate openings to form dielectric openings (32 or 52). Electron-emissive elements (36A or 56A) are formed in the dielectric openings. This typically involves introducing emitter material through the gate openings into the dielectric openings and using a lift-off layer (34), or an electrochemical technique, to remove excess emitter material.

대표청구항 ▼

[ We claim:] [1.] A method comprising the steps of:distributing a multiplicity of particles over an electrically insulating layer;providing electrically non-insulating gate material over the insulating layer at least in space between the particles;removing the particles and substantially any materia

[ We claim:] [1.] A method comprising the steps of:distributing a multiplicity of particles over an electrically insulating layer;providing electrically non-insulating gate material over the insulating layer at least in space between the particles;removing the particles and substantially any material overlying the particles such that the remaining gate material forms a gate layer through which gate openings extend at the locations of the so-removed particles;etching the insulating layer through the gate openings to form corresponding dielectric openings through the insulating layer substantially down to a lower electrically non-insulating region provided below the insulating layer; andintroducing electrically non-insulating emitter material into the dielectric openings to form corresponding electron-emissive elements over the lower non-insulating region such that the electron-emissive elements are externally exposed through the gate openings.