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Methods apparatus for storing and expanding wide instruction words in a computer system are provided. The computer system includes a memory and an instruction cache. Compressed instruction words of a program are stored in a code heap segment of the memory, and code pointers are stored in a code poin

Methods apparatus for storing and expanding wide instruction words in a computer system are provided. The computer system includes a memory and an instruction cache. Compressed instruction words of a program are stored in a code heap segment of the memory, and code pointers are stored in a code pointer segment of the memory. Each of the code pointers contains a pointer to one of the compressed instruction words. Part of the program is stored in the instruction cache as expanded instruction words. During execution of the program, an instruction word is accessed in the instruction cache. When the instruction word required for execution is not present in the instruction cache, thereby indicating a cache miss, a code pointer corresponding to the required instruction word is accessed in the code pointer segment of memory. The code pointer is used to access a compressed instruction word corresponding to the required instruction word in the code heap segment of memory. The compressed instruction word is expanded to provide an expanded instruction word, which is loaded into the instruction cache and is accessed for execution.

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[ What is claimed is:] [1.] A method for storing and expanding wide instruction words of a computer program in a computer system including a memory and an instruction cache, comprising the steps of:storing the wide instruction words in said instruction cache as expanded instruction words having a pr

[ What is claimed is:] [1.] A method for storing and expanding wide instruction words of a computer program in a computer system including a memory and an instruction cache, comprising the steps of:storing the wide instruction words in said instruction cache as expanded instruction words having a predetermined number of operation fields, any number of which may contain operations and any number of which may be empty;storing the wide instruction words in a code heap segment of said memory as compressed instruction words, said compressed instruction words being formed by compressing said expanded instruction words to remove the empty operation fields;storing code pointers in a code pointer segment of said memory, each of said code pointers containing a pointer to one of said compressed instruction words;accessing an instruction word of the program in said instruction cache for execution;when the instruction word required for execution is not present in said instruction cache, thereby indicating a cache miss, accessing a code pointer corresponding to said required instruction word in the code pointer segment of said memory;accessing a compressed instruction word corresponding to said required instruction word in the code heap segment of said memory, using the code pointer;expanding said compressed instruction word to provide an expanded instruction word;loading said expanded instruction word into said instruction cache; andaccessing said expanded instruction word in said instruction cache for execution.