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Flexible interconnect film including resistor and capacitor layers

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/053
  • H01L-023/02
  • H01L-023/48
출원번호 US-0731172 (1996-10-10)
발명자 / 주소
  • Saia Richard Joseph
  • Durocher Kevin Matthew
  • Cole Herbert Stanley
출원인 / 주소
  • General Electric Company
대리인 / 주소
    Agosti
인용정보 피인용 횟수 : 269  인용 특허 : 24

초록

A method for fabricating a flexible interconnect film includes applying a resistor layer over one or both surfaces of a dielectric film; applying a metallization layer over the resistor layer with the resistor layer including a material facilitating adhesion of the dielectric film and the metallizat

대표청구항

[ What is claimed is:] [1.] A composite thin film structure for use in fabrication of a flexible interconnect film including passive components, the composite thin film structure comprising:a dielectric film comprising a polymer;a resistor layer on at least a portion of the dielectric film;a first m

이 특허에 인용된 특허 (24)

  1. Eichelberger Charles W. (Schenectady NY) Wojnarowski Robert J. (Ballston Lake NY) Welles ; II Kenneth B. (Schenectady NY), Adaptive lithography system to provide high density interconnect.
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  180. Song, Insang, Passive devices and modules for transceiver.
  181. Laporte, Claire; Ezzeddine, Hilal, Passive integrated circuit.
  182. Wong, Marvin Glenn; Casey, John F., Photoimaged channel plate for a switch.
  183. Wong,Marvin Glenn; Casey,John F., Photoimaged channel plate for a switch.
  184. Wong,Marvin Glenn; Casey,John F., Photoimaged channel plate for a switch, and method for making a switch using same.
  185. Wong, Marvin Glenn, Piezoelectric optical relay.
  186. Wong, Marvin Glenn, Piezoelectrically actuated liquid metal switch.
  187. Wong, Marvin Glenn, Piezoelectrically actuated liquid metal switch.
  188. Wong, Marvin Glenn; Field, Leslie A, Polymeric liquid metal optical switch.
  189. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection process and structures.
  190. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection structures.
  191. Wong, Marvin Glenn, Pressure actuated optical latching relay.
  192. Wong, Marvin Glenn, Pressure actuated solid slug optical latching relay.
  193. Fong, Arthur; Wong, Marvin Glenn, Preventing corrosion degradation in a fluid-based switch.
  194. Fong, Arthur; Wong, Marvin Glenn, Push-mode latching relay.
  195. Wong, Marvin Glenn; Lindsey, John Ralph, Reducing oxides on a switching fluid in a fluid-based switch.
  196. Wong, Marvin Glenn; Lindsey, John Ralph, Reducing oxides on a switching fluid in a fluid-based switch.
  197. Lindsey,John Ralph, Reduction of oxides in a fluid-based switch.
  198. Wong, Marvin Glenn; Fong, Arthur, Reflecting wedge optical wavelength multiplexer/demultiplexer.
  199. Fong, Victor Chiu-Kit; Blecker, Eric Bruce; Kwan, Tom W.; Li, Ning; Ranganathan, Sumant; Tang, Chao; Vorenkamp, Pieter, Scalable integrated circuit high density capacitors.
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  202. Agarwal, Vishnu K., Semiconductor container structure with diffusion barrier.
  203. Vishnu K. Agarwal, Semiconductor container structure with diffusion barrier.
  204. Sunohara,Masahiro; Ueda,Keisuke, Semiconductor device.
  205. Kim, Sang Won; Jung, Boo Yang; Kim, Sung Kyu; Yoo, Min; Lee, Seung Jae, Semiconductor device and fabricating method thereof.
  206. Akagawa,Masatoshi, Semiconductor device and manufacturing method therefor.
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  210. Segawa, Mizuki; Yabu, Toshiki; Matsuzawa, Akira, Semiconductor device and method of manufacturing the same.
  211. Mashino, Naohiro; Higashi, Mitsutoshi, Semiconductor device and method of production of same.
  212. Do, Won Chul; Ko, Yong Jae, Semiconductor device comprising a conductive pad on a protruding-through electrode.
  213. Aoki, Yutaka, Semiconductor device having a chip size package including a passive element.
  214. Takahashi, Yoshikazu; Suzuki, Masami; Kimura, Masaru, Semiconductor device having a chip-size package.
  215. Yuzuriha Kojiro,JPX ; Ooi Makoto,JPX ; Kobayashi Shinichi,JPX, Semiconductor device having a structure for detecting a boosted potential.
  216. Yoshitomi, Takashi; Matsumoto, Masahiko, Semiconductor device having capacitor and method of manufacturing the same.
  217. Yoshitomi,Takashi; Matsumoto,Masahiko, Semiconductor device having capacitor and method of manufacturing the same.
  218. Tominaga Atsushi,JPX, Semiconductor device having high-density capacitor elements and manufacturing method thereof.
  219. Do, Won Chul; Jung, Yeon Seung; Ko, Yong Jae, Semiconductor device having through electrodes protruding from dielectric layer.
  220. Kikuchi,Katsumi; Shimoto,Tadanori; Baba,Kazuhiro, Semiconductor device mounting board, method of manufacturing the same, method of inspecting the same, and semiconductor package.
  221. Lee,Sang Ho; Yang,Jun Young; Lee,Seon Goo; Hyun,Jong Hae; Lee,Choon Heung, Semiconductor package including passive elements and method of manufacture.
  222. Lin, Mou-Shiung; Lee, Jin-Yuan; Huang, Ching-Cheng, Semiconductor package with interconnect layers.
  223. Wong, Marvin Glenn, Shear mode liquid metal switch.
  224. Hyv?nen, Lassi; H?m?l?inen, Miikka, Shielded laminated structure with embedded chips.
  225. Sherwood, Gregory J.; Daley, Jay E.; Byron, Mary M.; Stemen, Eric; Kuhn, Peter Jay, Sintered capacitor electrode including a folded connection.
  226. Fong, Arthur; Wong, Marvin Glenn, Solid slug longitudinal piezoelectric latching relay.
  227. Lee, Jin-Yuan; Huang, Ching-Cheng; Lin, Mou-Shiung, Structure and manufacturing method of chip scale package.
  228. Lee, Jin-Yuan; Huang, Ching-Cheng; Lin, Mou-Shiung, Structure and manufacturing method of chip scale package.
  229. Abdul-Ridha, Hadi; Young, David T.; Brongo, Maureen R., Structures based on ceramic tantalum nitride.
  230. Dove, Lewis R.; Wong, Marvin Glenn; Saito, Mitsuchika, Substrate with liquid electrode.
  231. Wong, Marvin Glenn; Liu, Ling, Suspended thin-film resistor.
  232. Wong, Marvin Glenn, Switch and production thereof.
  233. Shioga, Takeshi; Kurihara, Kazuaki, Thin film capacitor device used for a decoupling capacitor and having a resistor inside.
  234. LaFleur, Mike, Thin film capacitor having multi-layer dielectric film including silicon dioxide and tantalum pentoxide.
  235. Sunil D. Wijeyesekera ; Jing Jing ; Donald C. Benson ; Teruo Sasagawa, Thin film capacitors.
  236. Dunlap, Brett Arnold; Copia, Alexander William, Thin stackable package and method.
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  240. Hiner, David Jon; Huemoeller, Ronald Patrick, Through via connected backside embedded circuit features structure and method.
  241. Hiner, David Jon; Huemoeller, Ronald Patrick, Through via connected backside embedded circuit features structure and method.
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  244. Hiner, David Jon; Huemoeller, Ronald Patrick; Kelly, Michael G., Through via recessed reveal structure and method.
  245. Hiner, David Jon; Huemoeller, Ronald Patrick; Kelly, Michael G., Through via recessed reveal structure and method.
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  247. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  248. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  249. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  250. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  251. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  252. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  253. Lin,Mou Shiung, Top layers of metal for high performance IC's.
  254. Huemoeller, Ronald Patrick; Lie, Russ; Hiner, David, Two-sided fan-out wafer escape package.
  255. Wong,Marvin Glenn, Ultrasonically milled channel plate for a switch.
  256. Caser Fabio Tassan,ITX ; Dellabora Marco,ITX ; Defendi Marco,ITX, Voltage generator for electrically programmable non-volatile memory cells.
  257. Lin, Mou-Shiung; Wei, Gu-Yeon, Voltage regulator integrated with semiconductor chip.
  258. Wong, Marvin Glenn, Volume adjustment apparatus and method for use.
  259. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  260. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  261. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  262. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  263. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  264. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  265. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  266. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
  267. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package fabrication method.
  268. Baek,Seung Duk; Jang,Dong Hyeon; Kim,Gu Sung; Lee,Kang Wook; Chung,Jae Sik, Wafer-level electronic modules with integral connector contacts.
  269. Wong, Marvin Glenn; Carson, Paul Thomas, Wetting finger latching piezoelectric relay.
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