초록 ▼

To carry out the processing operations relating to the implementation of a Viterbi algorithm, an integrated circuit comprising a processor and a coprocessor is made. The coprocessor is constructed so as to carry out operations of accumulation, comparison and selection in order to limit or reduce the

To carry out the processing operations relating to the implementation of a Viterbi algorithm, an integrated circuit comprising a processor and a coprocessor is made. The coprocessor is constructed so as to carry out operations of accumulation, comparison and selection in order to limit or reduce the work of a processor that would have to carry out these operations. By judiciously choosing the structure of the coprocessor, it is possible to make this co-processor sufficiently programmable so that it is suited to various situations of implementation of the Viterbi algorithm.

대표청구항 ▼

[ What is claimed is:] [9.] A method for decoding a received signal implementing a Viterbi algorithm, the method comprising the following steps:a first adding step for adding a first old path metric to a first branch metric to produce a first new path metric;a second adding step for adding a second

[ What is claimed is:] [9.] A method for decoding a received signal implementing a Viterbi algorithm, the method comprising the following steps:a first adding step for adding a first old path metric to a first branch metric to produce a first new path metric;a second adding step for adding a second old path metric to a second branch metric to produce a second new path metric, wherein the first adding step and the second adding step are performed simultaneously;a first comparing step for comparing the first new path metric and the second new path metric to determine a first minimum path metric;a selecting step for selecting one of the first and second new path metrics as the first minimum path metric wherein the first minimum path metric is determined by a comparator, the comparator producing a control signal to control a multiplexer, and wherein the first minimum path metric is selected by the multiplexer; anddetermining a survivor value based on the control signal of the multiplexer wherein the control signal is stored as the survivor value.