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Nonvolatile semiconductor memory device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/788
출원번호 US-0884555 (1997-06-27)
우선권정보 JP-0170411 (1996-06-28)
발명자 / 주소
  • Watanabe Hiroshi,JPX
  • Shimizu Kazuhiro,JPX
  • Takeuchi Yuji,JPX
  • Aritome Seiichi,JPX
출원인 / 주소
  • Kabushiki Kaisha Toshiba, JPX
대리인 / 주소
    Banner & Witcoff, Ltd.
인용정보 피인용 횟수 : 76  인용 특허 : 1

초록

Disclosed is the memory cell of an EEPROM having a p-type silicon substrate and a floating gate formed on this silicon substrate via a tunnel oxide film. The element region set in the silicon substrate projects from the surface of a trench-type element isolation region. The projecting element region

대표청구항

[ We claim:] [1.] A nonvolatile semiconductor memory device comprising:a semiconductor substrate;an element isolation region formed in said substrate;an element region set on a surface of said substrate by the element isolation region to form a memory cell; anda memory cell array prepared by arrayin

이 특허에 인용된 특허 (1)

  1. Hart Michael J. (Palo Alto CA) Bergemont Albert M. (Santa Clara CA), High density EEPROM cell array which can selectively erase each byte of data in each row of the array.

이 특허를 인용한 특허 (76)

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  10. Bohumil Lojek, Eeprom cell with asymmetric thin window.
  11. Wang,Leo; Huang,Cheng Tung; Pittikoun,Saysamone, Fabricating method of a flash memory cell.
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  34. Bohumil Lojek, Method of making an EEPROM cell with asymmetric thin window.
  35. Brask, Justin K.; Doyle, Brian S.; Shah, Uday; Chau, Robert S., Method of patterning a film.
  36. Lee Jong-Seuk,KRX, Method of programming nonvolatile semiconductor device at low power.
  37. Takahashi Keita,JPX, Method of rewriting in nonvolatile semiconductor memory device.
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