초록 ▼

An apparatus and method for accelerating interpreters, interpretive environments, and the like optimizes the use of caches closest to a processor. An instruction set implementing a virtual machine (interpreter, interpretive environment) is written to fit each instruction at an individual cache line'

An apparatus and method for accelerating interpreters, interpretive environments, and the like optimizes the use of caches closest to a processor. An instruction set implementing a virtual machine (interpreter, interpretive environment) is written to fit each instruction at an individual cache line's address in the processor cache. The processor cache may be loaded with the instruction set in a compiled, linked, loaded image. After loading the processor cache, the cache is pinned, locked, disabled from flushing the contents or replacing the contents of any cache line. Faster loading of the processor cache may be achieved by flushing the processor cache and running an application containing all of the instructions of the virtual machine instruction set. Level-1 processor caches integrated into central processing units, particularly instruction caches or code caches are ideally suited to implementation of the invention. Examples include Intel's Pentium.TM. class products and Motorola's Power PC Processors.

대표청구항 ▼

[ What is claimed and desired to be secured by United States Letters Patent is:] [1.] An apparatus for accelerating execution in an interpretive environment, the apparatus comprising:a processor for executing executables;a memory device operably connected to the processor and containing the executab

[ What is claimed and desired to be secured by United States Letters Patent is:] [1.] An apparatus for accelerating execution in an interpretive environment, the apparatus comprising:a processor for executing executables;a memory device operably connected to the processor and containing the executables to be executed by the processor;a processor cache operably connected to the memory device to receive and persistently store the executables, the processor programmed to control the persistence of the executables within the processor cache by pinning the executables within the processor cache.