초록 ▼

A multiprocessor having an input/output controller, a process controller, and a multidimensional arrays of field programmable gate arrays (FPGAs), each FPGA having its own local memory. The multiprocessor may be programmed to function as a single-instruction, multiple-data (SIMD) parallel processor

A multiprocessor having an input/output controller, a process controller, and a multidimensional arrays of field programmable gate arrays (FPGAs), each FPGA having its own local memory. The multiprocessor may be programmed to function as a single-instruction, multiple-data (SIMD) parallel processor having a matrix of processing elements (PEs), where each FPGA may be programmed to operate as a submatrix array of PEs. The multiprocessor is especially useful for image processing, pattern recognition, and neural network applications.

대표청구항 ▼

[ What is claimed is:] [1.] A multiprocessor comprising:(a) a multidimensional array of field programmable gate arrays (FPGAs), each FPGA having local memory;(b) a process controller, connected to the array of FPGAs; and(c) an input/output (I/O) controller, connected to the array of FPGAs and to the

[ What is claimed is:] [1.] A multiprocessor comprising:(a) a multidimensional array of field programmable gate arrays (FPGAs), each FPGA having local memory;(b) a process controller, connected to the array of FPGAs; and(c) an input/output (I/O) controller, connected to the array of FPGAs and to the process controller, wherein:the array of FPGAs is adapted to be programmed as a matrix of processing elements (PEs), wherein each FPGA in the array corresponds to two or more PEs;the process controller is adapted to control processing implemented by the PEs; andthe I/O controller is adapted to control data flow into and out of the PEs and the process controller.