초록 ▼

A PCMCIA card includes a processor and a dual-ported memory thereon. The PCMCIA card is plugged into a host, such that both the PCMCIA card's processor and the host have access to the dual-ported memory. Upon initialization, the host will load the dual-ported memory will a boot sequence for the proc

A PCMCIA card includes a processor and a dual-ported memory thereon. The PCMCIA card is plugged into a host, such that both the PCMCIA card's processor and the host have access to the dual-ported memory. Upon initialization, the host will load the dual-ported memory will a boot sequence for the processor on the PCMCIA card. The processor on the PCMCIA card is then released from a reset state, and proceeds to boot from the boot sequence loaded by the host. The processor on the PCMCIA card is released from reset by the host accessing a predetermined location within the address space of the PCMCIA card.

대표청구항 ▼

[ I claim:] [1.] A PCMCIA card comprising:a processor configured to boot by executing instructions at a boot location;a memory coupled to said processor, said memory containing said boot location and containing a memory integrity checking program for a region of a non-volatile memory within said PCM

[ I claim:] [1.] A PCMCIA card comprising:a processor configured to boot by executing instructions at a boot location;a memory coupled to said processor, said memory containing said boot location and containing a memory integrity checking program for a region of a non-volatile memory within said PCMCIA card, and containing instructions to transfer program execution to code within said non-volatile memory after successful completion of said integrity checking;a PCMCIA interface circuit configured to couple said PCMCIA card to a host computer, said PCMCIA interface circuit being coupled to said memory such that both said host and said processor have access to said memory when said PCMCIA card is coupled to said host;reset logic configured to reset said PCMCIA card and suspend processor execution; andboot logic configured to release said suspended processor execution and begin said processor booting at said boot location.