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Wafer transfer system and method of using the same 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/3065
  • B65G-025/08
출원번호 US-0677136 (1996-07-09)
발명자 / 주소
  • Toshima Masato
출원인 / 주소
  • Gamma Precision Technology, Inc.
대리인 / 주소
    Lyon & Lyon LLP
인용정보 피인용 횟수 : 47  인용 특허 : 19

초록

A wafer transfer system is described for transferring a wafer while at substantially the same time another wafer is being processed. The wafer transfer system comprises, in one embodiment, a transfer chamber having a wafer transfer blade, a load lock chamber coupled to the transfer chamber, an atmos

대표청구항

[ We claim:] [1.] An apparatus for transferring and processing a plurality of wafers, comprising:a transfer chamber within which processing of said plurality of wafers takes place;a load lock chamber coupled to said transfer chamber;a transfer blade located within said transfer chamber, said transfe

이 특허에 인용된 특허 (19)

  1. Maeda Kazuo (Tokyo JPX) Ohira Kouichi (Tokyo JPX) Hirose Mitsuo (Tokyo JPX), Apparatus for manufacturing semiconductor device.
  2. Boys Donald R. (Cupertino CA) Graves Walter E. (San Jose CA), Dial deposition and processing apparatus.
  3. Thomas Michael E. (Milpitas CA) van de Van Everhardus P. (Cupertino CA) Broadbent Eliot K. (San Jose CA), Gas-based backside protection during substrate processing.
  4. Campbell Gregor A. (Glendale CA) Conn Robert W. (Los Angeles CA) Katz Dan (Beverly Hills CA) Parker N. William (Fairfield CA) de Chambrier Alexis (Glendale CA), High density plasma deposition and etching apparatus.
  5. Benzing Jeffrey C. (Saratoga CA) Broadbent Eliot K. (San Jose CA) Rough J. Kirkwood H. (San Jose CA), Induction plasma source.
  6. Benzing Jeffrey C. (Saratoga CA) Broadbent Eliot K. (San Jose CA) Rough Kirkwood H. (San Jose CA), Induction plasma source.
  7. Dible Robert D. (Fremont CA), Methods and apparatus for generating plasma.
  8. Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multichamber integrated process system.
  9. Mattson Brad S. (19251 Black Rd. Los Gatos CA 95030) Martin Ralph S. (1582 S. Wolfe Rd. Sunnyvale CA 94087), Plasma contamination removal process.
  10. Usui Kaoru (Kawasaki JPX), Plasma generating apparatus and method.
  11. Hama Kiichi (Chino JPX) Hata Jiro (Yamanashi-ken JPX) Hongoh Toshiaki (Yamanashi-ken JPX), Plasma process apparatus.
  12. Yin Gerald Z. (Cupertino CA) Hanawa Hiroji (Santa Clara CA) Ma Diana X. (San Jose CA) Olgado Donald (Mountain View CA), Plasma reactor with multi-section RF coil and isolated conducting lid.
  13. Maher Joseph A. (South Hamilton MA) Vowles E. John (Goffstown NH) Napoli Joseph D. (Winham NH) Zafiropoulo Arthur W. (Manchester MA) Miller Mark W. (Burlington MA), Quad processor.
  14. Higashi Kumiko (Kumamoto JPX), Rotary type apparatus for processing semiconductor wafers and method of processing semiconductor wafers.
  15. Begin Robert George ; Clarke Peter J., System for providing a controlled deposition on wafers.
  16. Toshima Masato (Campbell CA), Vacuum chamber slit valve.
  17. Dimock Jack A. (Santa Barbara CA) Woestenburg Dirk P. (Summerland CA), Wafer processing machine with evacuated wafer transporting and storage system.
  18. Wada Athushi (Tokyo JPX), Wafer transfer device.
  19. Somekh Sasson (Los Altos Hills CA) Fairbairn Kevin (Saratoga CA) Kolstoe Gary M. (Fremont CA) White Gregory W. (San Carlos CA) Faraco ; Jr. W. George (Saratoga CA), Wafer tray and ceramic blade for semiconductor processing apparatus.

이 특허를 인용한 특허 (47)

  1. Hendrickson Ruth Ann ; Van der Meulen Peter F., Apparatus and method for transporting substrates.
  2. Beloussov, Alexandre V.; Baumann, Michael A.; Olsen, Howard B.; Salem, Dana, Configuration management and retrieval system for proton beam therapy system.
  3. Lindner, Friedrich Paul; Hangweier, Peter Oliver, Device and method for processing of wafers.
  4. Lindner, Friedrich Paul; Hangweier, Peter-Oliver, Device and method for processing wafers.
  5. Kraus, Joseph Arthur; Strassner, James David, Dual wafer load lock.
  6. Stevens, Craig Lyle, High throughput architecture for semiconductor processing.
  7. Novak, W. Thomas, Kinematic mounted reference mirror with provision for stable mounting of alignment optics.
  8. Novak, W. Thomas, Low distortion kinematic reticle support.
  9. Kadomura Shingo,JPX ; Jozaki Tomohide,JPX ; Hirano Shinsuke,JPX, Method and apparatus for dry etching with temperature control.
  10. Ishizawa Shigeru,JPX ; Ogi Tatsuya,JPX ; Mochizuki Hiroaki,JPX, Method for recovering object to be treated after interruption.
  11. Yamazaki, Shunpei; Teramoto, Satoshi; Kusumoto, Naoto; Ohnuma, Hideto, Method of manufacturing a semiconductor device and manufacturing system thereof.
  12. Yamazaki, Shunpei; Teramoto, Satoshi; Kusumoto, Naoto; Ohnuma, Hideto, Method of manufacturing a semiconductor device and manufacturing system thereof.
  13. Mitsuki, Toru; Shichi, Takeshi; Maekawa, Shinji; Shibata, Hiroshi; Miyanaga, Akiharu, Method of manufacturing a semiconductor device having a crystallized semiconductor film.
  14. van der Meulen, Peter, Mid-entry load lock for semiconductor handling system.
  15. van der Meulen,Peter, Mid-entry load lock for semiconductor handling system.
  16. Bright Nick ; Mooring Ben, Modular architecture for semiconductor wafer fabrication equipment.
  17. Sung-bum Cho KR; Hak-pil Kim KR; Eun-hee Shin KR; Baik-soon Choi KR, Plasma process apparatus with in situ monitoring, monitoring method, and in situ residue cleaning.
  18. Cho Sung-bum,KRX ; Kim Hak-pil,KRX ; Shin Eun-hee,KRX ; Choi Baik-soon,KRX, Plasma process apparatus with in situ monitoring, monitoring method, and in situ residue cleaning method.
  19. Guenzi, Richard Dale; Feie, Mark Stephen, Robotic order picking system.
  20. Yamazaki, Shunpei; Adachi, Hiroki; Kuwabara, Hideaki, Semiconductor device having semiconductor circuit comprising semiconductor element, and method for manufacturing same.
  21. Wood, Eric R.; Crabb, Richard; Alexander, James A., Semiconductor handling robot with improved paddle-type end effector.
  22. Wood,Eric R.; Crabb,Richard; Alexander,James A., Semiconductor handling robot with improved paddle-type end effector.
  23. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D., Semiconductor manufacturing process module.
  24. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D., Semiconductor manufacturing process modules.
  25. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D., Semiconductor manufacturing process modules.
  26. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D., Semiconductor manufacturing process modules.
  27. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D., Semiconductor manufacturing process modules.
  28. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D., Semiconductor manufacturing process modules.
  29. van der Meulen, Peter, Semiconductor manufacturing systems.
  30. Yamagishi, Takayuki; Suwada, Masaei; Watanabe, Takeshi, Semiconductor processing apparatus comprising chamber partitioned into reaction and transfer sections.
  31. Yamagishi,Takayuki; Suwada,Masaei; Watanabe,Takeshi, Semiconductor processing apparatus comprising chamber partitioned into reaction and transfer sections.
  32. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D.; Ritter, Raymond S.; Schaefer, Thomas A., Semiconductor wafer handling and transport.
  33. van der Meulen, Peter; Kiley, Christopher C; Pannese, Patrick D.; Ritter, Raymond S.; Schaefer, Thomas A., Semiconductor wafer handling and transport.
  34. van der Meulen, Peter; Kiley, Christopher C.; Pannese, Patrick D.; Ritter, Raymond S.; Schaefer, Thomas A., Semiconductor wafer handling transport.
  35. Patton, Evan E.; Cacouris, Theodore; Broadbent, Eliot; Mayer, Steven T., Sequential station tool for wet processing of semiconductor wafers.
  36. Patton, Evan E.; Cacouris, Theodore; Broadbent, Eliot; Mayer, Steven T., Sequential station tool for wet processing of semiconductor wafers.
  37. Patton, Evan E.; Cacouris, Theodore; Broadbent, Eliot; Mayer, Steven T., Sequential station tool for wet processing of semiconductor wafers.
  38. Patton,Evan E.; Cacouris,Theodore; Broadbent,Eliot; Mayer,Steven T., Sequential station tool for wet processing of semiconductor wafers.
  39. Bhola De ; Mark Spencer Grey, Spatula for separation of thinned wafer from mounting carrier.
  40. Yoshida Yasushi,JPX, Substrate feed control.
  41. Cox Gerald M., Synchronous multiplexed near zero overhead architecture for vacuum processes.
  42. Cox Gerald M., Synchronous multiplexed near zero overhead architecture for vacuum processes.
  43. Swank, John D., System and method for analyzing power flow in semiconductor plasma generation systems.
  44. Aggarwal, Ravinder; Kusbel, James F., Transfer chamber with integral loadlock and staging station.
  45. Kevin K. Chan ; Christopher P. D'Emic ; Raymond M. Sicina ; Paul M. Kozlowski ; Margaret Manny ; Sandip Tiwari, UHV horizontal hot wall cluster CVD/growth design.
  46. Soraoka Minoru,JPX ; Yoshioka Ken,JPX ; Kawasaki Yoshinao,JPX, Vacuum processing apparatus and semiconductor manufacturing line using the same.
  47. Toshima Masato, Wafer transfer system.
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