초록 ▼

A novel MOS transistor having minimal junction capacitance in this method of fabrication. According to the present invention, a gate dielectric layer is formed on a first surface of the semiconductor substrate. A gate electrode is then formed on the gate dielectric layer. Next, a pair of recesses ar

A novel MOS transistor having minimal junction capacitance in this method of fabrication. According to the present invention, a gate dielectric layer is formed on a first surface of the semiconductor substrate. A gate electrode is then formed on the gate dielectric layer. Next, a pair of recesses are formed in the semiconductor substrate on opposite sides of the gate electrode. A dielectric layer is then formed on the surface of each of the recesses. A Semiconductor material is then deposited into the recesses to form a pair of source/drain regions.

대표청구항 ▼

[ We claim:] [1.] A method of forming a transistor, said method comprising the steps of:forming a gate dielectric layer on a first surface of a semiconductor substrate;forming a gate electrode on said gate dielectric layer;forming a pair of recesses in said semiconductor substrate in alignment with

[ We claim:] [1.] A method of forming a transistor, said method comprising the steps of:forming a gate dielectric layer on a first surface of a semiconductor substrate;forming a gate electrode on said gate dielectric layer;forming a pair of recesses in said semiconductor substrate in alignment with the outside edges of said gate electrode;forming a first semiconductor material in said recesses; andafter forming said first semiconductor material, forming a dielectric layer in said recess beneath said first semiconductor material.