초록 ▼

A method and apparatus for distributing clock drivers within a hierarchical circuit design, wherein the clock drivers are concentrated in locations where they are actually needed rather than uniformly distributed throughout the circuit design. In an exemplary embodiment, the actual clock loads withi

A method and apparatus for distributing clock drivers within a hierarchical circuit design, wherein the clock drivers are concentrated in locations where they are actually needed rather than uniformly distributed throughout the circuit design. In an exemplary embodiment, the actual clock loads within a selected hierarchical region are determined, and a sufficient number of clock drivers are added as children objects to the selected hierarchical region. Since many placement tools may place the children objects within an outer boundary of the corresponding parent object, the clock drivers, as children objects of the selected hierarchical region, may be placed within the outer boundary of the selected hierarchical region. Accordingly, the clock drivers may be concentrated in the locations where actually needed.

대표청구항 ▼

[ What is claimed is:] [1.] A method for providing a clock tree for a hierarchical circuit design wherein the circuit design includes a number of circuit portions each having a hierarchical boundary, the clock tree including a number of clock drivers wherein each of the clock drivers has a clock loa

[ What is claimed is:] [1.] A method for providing a clock tree for a hierarchical circuit design wherein the circuit design includes a number of circuit portions each having a hierarchical boundary, the clock tree including a number of clock drivers wherein each of the clock drivers has a clock load limit, and wherein each of the circuit portions include a number of lower level hierarchical portions that present a predetermined clock load, the method comprising the steps of:a. calculating a first total clock load for selected lower level hierarchical portions within a selected one of the number of circuit portions;b. calculating the number of clock drivers that are required to drive the total clock load of the selected circuit portion, while maintaining the clock load on each of the clock drivers below the corresponding clock load limit, thereby resulting in a first calculated number of clock drivers;c. adding the first calculated number of clock drivers to the selected circuit portion;d. placing the selected circuit portion at a desired location, including the corresponding boundary; ande. placing the first calculated number of clock drivers within the boundary of the selected circuit portion.