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Method for fabricating copper-aluminum metallization 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0786004 (1997-01-21)
발명자 / 주소
  • Dubin Valery
  • Ting Chiu
출원인 / 주소
  • Advanced Micro Devices, Inc.
대리인 / 주소
    Skjerven, Morrill, MacPherson, Franklin & Friel, LLPKwok
인용정보 피인용 횟수 : 287  인용 특허 : 4

초록

A method for fabricating copper-aluminum metallization utilizing the technique of electroless copper deposition is described. The method provides a self-encapsulated copper-aluminum metallization structure.

대표청구항

[ We claim:] [1.] A method for fabricating copper alloy metallization in a recess defined in a dielectric layer of a substrate, the method comprising the steps of:depositing a diffusion barrier layer on the surfaces of the recess;depositing a copper alloy layer on the diffusion barrier layer; andann

이 특허에 인용된 특허 (4)

  1. Kondo Koji (Chiryu JPX) Amakusa Seiji (Kariya JPX) Murakawa Katuhiko (Toyota JPX) Kojima Katsuaki (Nagoya JPX) Ishida Nobumasa (Chiryu JPX) Ishikawa Junji (Nagoya JPX) Ishikawa Futoshi (Nagoya JPX), Electroless copper plating solution and process for formation of copper film.
  2. Sato Hiroaki,JPX ; Ebe Masayoshi,JPX, Method for producing circuit board, for semiconductor package, having cavity for accommodating semiconductor element.
  3. Andricacos Panayotis Constantinou ; Comfort James Hartfiel ; Grill Alfred ; Kotecki David Edward ; Patel Vishnubhai Vitthalbhai ; Saenger Katherine Lynn ; Schrott Alejandro Gabriel, Plating of noble metal electrodes for DRAM and FRAM.
  4. Zhao Bin (Austin TX) Vasudev Prahalad K. (Austin TX) Dubin Valery M. (Cupertino CA) Shacham-Diamand Yosef (Ithaca NY) Ting Chiu H. (Saratoga CA), Selective electroless copper deposited interconnect plugs for ULSI applications.

이 특허를 인용한 특허 (287)

  1. Cohen, Uri, Advanced seed layers for interconnects.
  2. Nemani, Srinivas D.; Koshizawa, Takehito, Air gap process.
  3. Purayath, Vinod R.; Ingle, Nitin K., Air gaps between copper lines.
  4. Kang, Sean; Ko, Jungmin; Luere, Oliver, Airgap formation with damage-free copper.
  5. Lee, Wei Ti; Hassan, Mohd Fadzli Anwar; Guo, Ted; Yu, Sang-Ho, Aluminum contact integration on cobalt silicide junction.
  6. Wang, Xikun; Wang, Anchuan; Ingle, Nitin K., Aluminum oxide selective etch.
  7. Wang, Xikun; Wang, Anchuan; Ingle, Nitin K., Aluminum selective etch.
  8. Xue, Jun; Hsu, Ching-Mei; Li, Zihui; Godet, Ludovic; Wang, Anchuan; Ingle, Nitin K., Anisotropic gap etch.
  9. Chen,Linlin; Wilson,Gregory J.; McHugh,Paul R.; Weaver,Robert A.; Ritzdorf,Thomas L., Apparatus and method for electrochemically depositing metal on a semiconductor workpiece.
  10. Chen,Linlin; Wilson,Gregory J.; McHugh,Paul R.; Weaver,Robert A.; Ritzdorf,Thomas L., Apparatus and method for electrochemically depositing metal on a semiconductor workpiece.
  11. Chen, LinLin, Apparatus and method for electrolytically depositing a metal on a workpiece.
  12. Chen, Linlin, Apparatus and method for electrolytically depositing copper on a semiconductor workpiece.
  13. Chen, Linlin; Taylor, Thomas, Apparatus and method for electrolytically depositing copper on a semiconductor workpiece.
  14. Chen, Linlin; Taylor, Thomas, Apparatus and method for electrolytically depositing copper on a semiconductor workpiece.
  15. Chen, LinLin, Apparatus and method for electrolytically depositing copper on a workpiece.
  16. Cohen, Uri, Apparatus for depositing seed layers.
  17. Lubomirsky,Dmitry; Shanmugasundram,Arulkumar; Pancham,Ian A.; Lopatin,Sergey, Apparatus for electroless deposition.
  18. Lubomirsky, Dmitry; Shanmugasundram, Arulkumar; Ellwanger, Russell; Pancham, Ian A.; Cheboli, Ramakrishna; Weidman, Timothy W., Apparatus for electroless deposition of metals onto semiconductor substrates.
  19. Lubomirsky, Dmitry; Shanmugasundram, Arulkumar; Pancham, Ian A., Apparatus for electroless deposition of metals onto semiconductor substrates.
  20. Chung,Hua; Chen,Ling; Yu,Jick; Chang,Mei, Apparatus for integration of barrier layer and seed layer.
  21. Cohen, Uri, Apparatus for making interconnect seed layers and products.
  22. Ivanov, Igor C., Barrier layer configurations and methods for processing microelectronic topographies having barrier layers.
  23. Chang, Chung-Liang; Hsieh, Ching-Hua; Shue, Shau-Lin, Barrier material and process for Cu interconnect.
  24. Ohla, Klaus; Scharf, Michael, Bearing material for the manufacture of wear-resistant slide bearings made of a copper-aluminum-alloy with defined cover layers.
  25. Fork, David K.; Shea, Stephen Patrick, Bifacial cell with extruded gridline metallization.
  26. Benjaminson, David; Lubomirsky, Dmitry; Math, Ananda Seelavanth; Natarajan, Saravanakumar; Chourey, Shubham, Bolted wafer chuck thermal management systems and methods for wafer processing systems.
  27. Benjaminson, David; Lubomirsky, Dmitry; Math, Ananda Seelavanth; Natarajan, Saravanakumar; Chourey, Shubham, Bolted wafer chuck thermal management systems and methods for wafer processing systems.
  28. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  29. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  30. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  31. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  32. Lubomirsky, Dmitry, Chamber with flow-through source.
  33. Lubomirsky, Dmitry, Chamber with flow-through source.
  34. Liang, Qiwei; Chen, Xinglong; Chuc, Kien; Lubomirsky, Dmitry; Park, Soonam; Yang, Jang-Gyoo; Venkataraman, Shankar; Tran, Toan; Hinckley, Kimberly; Garg, Saurabh, Chemical control features in wafer process equipment.
  35. Liang, Qiwei; Chen, Xinglong; Chuc, Kien; Lubomirsky, Dmitry; Park, Soonam; Yang, Jang-Gyoo; Venkataraman, Shankar; Tran, Toan; Hinckley, Kimberly; Garg, Saurabh, Chemical control features in wafer process equipment.
  36. Wang, Xikun; Pandit, Mandar; Cui, Zhenjiang; Korolik, Mikhail; Wang, Anchuan; Ingle, Nitin K.; Liu, Jie, Chlorine-based hardmask removal.
  37. Wang, Xikun; Cui, Zhenjiang; Park, Soonam; Ingle, Nitin K., Cobalt-containing material removal.
  38. Lubomirsky, Dmitry; Kim, Sung Je, Conditioned semiconductor system parts.
  39. Wang, Anchuan; Zhang, Jingchun; Ingle, Nitin K.; Lee, Young S., Conformal oxide dry etch.
  40. Wang, Anchuan; Zhang, Jingchun; Ingle, Nitin K.; Lee, Young S., Conformal oxide dry etch.
  41. Weidman, Timothy W.; Wijekoon, Kapila P.; Zhu, Zhize; Gelatos, Avgerinos V. (Jerry); Khandelwal, Amit; Shanmugasundram, Arulkumar; Yang, Michael X.; Mei, Fang; Moghadam, Farhad K., Contact metallization scheme using a barrier layer over a silicide layer.
  42. Gandikota, Srinivas; Tao, Rong; Chen, Liang-Yuh; Ramaswami, Seshadri, Continuous, non-agglomerated adhesion of a seed layer to a barrier layer.
  43. Ponnuswamy, Thomas A.; Sukamto, John H.; Reid, Jonathan D.; Mayer, Steven T.; Zhu, Huanfeng, Copper electroplating process for uniform across wafer deposition and void free filling on ruthenium coated wafers.
  44. Ponnuswamy, Thomas A.; Sukamto, John H.; Reid, Jonathan D.; Mayer, Steven T., Copper electroplating process for uniform across wafer deposition and void free filling on semi-noble metal coated wafers.
  45. Uzoh Cyprian E., Copper film including laminated impurities.
  46. Nogami Takeshi ; Ngo Minh Van ; Pramanick Shekhar, Copper metalization with improved electromigration resistance.
  47. Farrar Paul A., Copper metallurgy in integrated circuits.
  48. Farrar, Paul A., Copper metallurgy in integrated circuits.
  49. Hoinkis, Mark; Yan, Chun; Miyazoe, Hiroyuki; Joseph, Eric, Copper residue chamber clean.
  50. Burrell,Lloyd G.; Cooney, III,Edward E.; Gambino,Jeffrey P.; Heidenreich, III,John E.; Lee,Hyun Koo; Levy,Mark D.; Li,Baozhen; Luce,Stephen E.; McDevitt,Thomas L.; Stamper,Anthony K.; Wong,Kwong Hon;, Copper to aluminum interlayer interconnect using stud and via liner.
  51. Burrell,Lloyd G.; Cooney, III,Edward E.; Gambino,Jeffrey P.; Heidenreich, III,John E.; Lee,Hyun Koo; Levy,Mark D.; Li,Baozhen; Luce,Stephen E.; McDevitt,Thomas L.; Stamper,Anthony K.; Wong,Kwong Hon;, Copper to aluminum interlayer interconnect using stud and via liner.
  52. Zhu, Lina; Kang, Sean S.; Nemani, Srinivas D.; Kao, Chia-Ling, Delicate dry clean.
  53. Park, Seung H.; Wang, Yunyu; Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K., Differential silicon oxide etch.
  54. Park, Seung H.; Wang, Yunyu; Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K., Differential silicon oxide etch.
  55. Purayath, Vinod R.; Wang, Anchuan; Ingle, Nitin K., Dopant etch selectivity control.
  56. Zhang, Jingchun; Ingle, Nitin K.; Wang, Anchuan, Dry etch process.
  57. Kim, Sang Hyuk; Yang, Dongqing; Lee, Young S.; Jung, Weon Young; Kim, Sang-jin; Hsu, Ching-Mei; Wang, Anchuan; Ingle, Nitin K., Dry-etch for selective oxidation removal.
  58. Wang, Xikun; Hsu, Ching-Mei; Ingle, Nitin K.; Li, Zihui; Wang, Anchuan, Dry-etch for selective tungsten removal.
  59. Wang, Xikun; Hsu, Ching-Mei; Ingle, Nitin K.; Li, Zihui; Wang, Anchuan, Dry-etch for selective tungsten removal.
  60. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K.; Wang, Yunyu; Lee, Young, Dry-etch for silicon-and-carbon-containing films.
  61. Ren, He; Yang, Jang-Gyoo; Baek, Jonghoon; Wang, Anchuan; Park, Soonam; Garg, Saurabh; Chen, Xinglong; Ingle, Nitin K., Dry-etch selectivity.
  62. Ren, He; Yang, Jang-Gyoo; Baek, Jonghoon; Wang, Anchuan; Park, Soonam; Garg, Saurabh; Chen, Xinglong; Ingle, Nitin K., Dry-etch selectivity.
  63. Pramanick Shekhar ; Brown Dirk ; Iacoponi John A., Dual barrier and conductor deposition in a dual damascene process for semiconductors.
  64. Cho, Tae Seung; Sen, Yi-Heng; Park, Soonam; Lubomirsky, Dmitry, Dual discharge modes operation for remote plasma.
  65. Minshall, Edmund B.; Biggs, Kevin; Stowell, R. Marshall; Fetters, Wayne, Electroless copper deposition apparatus.
  66. Andryuschenko, Tatyana N.; Reid, Jonathan D.; Mayer, Steven T.; Webb, Eric G., Electroless copper deposition method for preparing copper seed layers.
  67. Varadarajan,Seshasayee; Zhou,Jian, Electroless copper fill process.
  68. Stevens,Joseph J.; Lubomirsky,Dmitry; Pancham,Ian; Olgado,Donald J. K.; Grunes,Howard E.; Mok,Yeuk Fai Edwin, Electroless deposition apparatus.
  69. Padhi, Deenesh; Yahalom, Joseph; Ramanathan, Sivakami; McGuirk, Chris R.; Gandikota, Srinivas; Dixit, Girish, Electroless deposition method.
  70. Padhi, Deenesh; Yahalom, Joseph; Ramanathan, Sivakami; McGuirk, Chris R.; Gandikota, Srinivas; Dixit, Girish, Electroless deposition method.
  71. Gandikota, Srinivas; McGuirk, Chris R.; Padhi, Deenesh; Malik, Muhammad Atif; Ramanathan, Sivakami; Dixit, Girish A.; Cheung, Robin, Electroless deposition method over sub-micron apertures.
  72. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  73. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  74. Park, Heung L.; Webb, Eric G.; Reid, Jonathan D.; Cleary, Timothy Patrick, Electroless layer plating process and apparatus.
  75. Farrar,Paul A., Electronic apparatus having a core conductive structure within an insulating layer.
  76. Shaddock, David Mulford; Andarawis, Emad Andarawis, Electronic circuit board, assembly and a related method thereof.
  77. Feng, Jingbin; He, Zhian; Rash, Robert; Mayer, Steven T., Electroplating apparatus with vented electrolyte manifold.
  78. Too, Elena H.; Gerst, Paul R.; Paneccasio, Jr., Vincent; Hurtubise, Richard W., Electroplating chemistry for the CU filling of submicron features of VLSI/ULSI interconnect.
  79. Maindron, Tony; Troc, Nicolas, Encapsulation process and associated device.
  80. Ingle, Nitin K.; Lubomirsky, Dmitry; Chen, Xinglong; Venkataraman, Shankar, Enhanced etching processes using remote plasma sources.
  81. Uzoh Cyprian E., Enhancing copper electromigration resistance with indium and oxygen lamination.
  82. Korolik, Mikhail; Ingle, Nitin K.; Zhang, Jingchun; Wang, Anchuan; Liu, Jie, Etch suppression with germanium.
  83. Wang, Xikun; Liu, Jie; Wang, Anchuan; Ingle, Nitin K., Even tungsten etch for high aspect ratio trenches.
  84. Koos, Daniel A.; Mayer, Steven T.; Park, Heung L.; Cleary, Timothy Patrick; Mountsier, Thomas, Fabrication of semiconductor interconnect structure.
  85. Mayer, Steven T.; Koos, Daniel A.; Webb, Eric, Fabrication of semiconductor interconnect structure.
  86. Mayer, Steven T.; Koos, Daniel A.; Webb, Eric, Fabrication of semiconductor interconnect structure.
  87. Purayath, Vinod R.; Ingle, Nitin K., Flash gate air gap.
  88. Pandit, Mandar; Wang, Xikun; Cui, Zhenjiang; Korolik, Mikhail; Wang, Anchuan; Ingle, Nitin K., Fluorine-based hardmask removal.
  89. Farrar Paul A., Forming submicron integrated-circuit wiring from gold, silver, copper, and other metals.
  90. Park, Seung; Wang, Xikun; Liu, Jie; Wang, Anchuan; Kim, Sang-jin, Gas-phase tungsten etch.
  91. Kim, Sung Je; Kalita, Laksheswar; Pareek, Yogita; Kadam, Ankur; Goradia, Prerna Sonthalia; Thakur, Bipin; Lubomirsky, Dmitry, Generation of compact alumina passivation layers on aluminum plasma equipment components.
  92. Korolik, Mikhail; Ingle, Nitin; Kioussis, Dimitri, Germanium etching systems and methods.
  93. Cho, Tae; Kang, Sang Won; Yang, Dongqing; Lu, Raymond W.; Hillman, Peter; Celeste, Nicholas; Tan, Tien Fak; Park, Soonam; Lubomirsky, Dmitry, Grooved insulator to reduce leakage current.
  94. Sinha, Nishant; Morgan, Paul A., High aspect ratio fill method and resulting structure.
  95. Sinha, Nishant; Morgan, Paul A., High aspect ratio fill method and resulting structure.
  96. Tran, Toan Q.; Malik, Sultan; Lubomirsky, Dmitry; Roy, Shambhu N.; Kobayashi, Satoru; Cho, Tae Seung; Park, Soonam; Venkataraman, Shankar, High temperature chuck for plasma processing systems.
  97. Chen, Zhijun; Li, Zihui; Ingle, Nitin K.; Wang, Anchuan; Venkataraman, Shankar, Highly selective doped oxide removal method.
  98. Farrar,Paul A., Hplasma treatment.
  99. Cheung Robin ; Carl Daniel A. ; Dordi Yezdi ; Hey Peter ; Morad Ratson ; Chen Liang-Yuh ; Smith Paul F. ; Sinha Ashok K., In-situ electroless copper seed layer enhancement in an electroplating system.
  100. Chen, Xinglong; Lubomirsky, Dmitry; Venkataraman, Shankar, Insulated semiconductor faceplate designs.
  101. Purayath, Vinod R.; Thakur, Randhir; Venkataraman, Shankar; Ingle, Nitin K., Integrated bit-line airgap formation and gate stack post clean.
  102. Purayath, Vinod R.; Thakur, Randhir; Venkataraman, Shankar; Ingle, Nitin K., Integrated bit-line airgap formation and gate stack post clean.
  103. Dubin,Valery M., Integrated circuit with metal layer having carbon nanotubes and methods of making same.
  104. Farrar Paul A., Integrated circuit with oxidation-resistant polymeric layer.
  105. Purayath, Vinod R.; Thakur, Randhir; Ingle, Nitin K., Integrated oxide and nitride recess for better channel contact in 3D architectures.
  106. Purayath, Vinod R.; Thakur, Randhir; Venkataraman, Shankar; Ingle, Nitin K., Integrated oxide recess and floating gate fin trimming.
  107. Chung, Hua; Maity, Nirmalya; Yu, Jick; Mosely, Roderick Craig; Chang, Mei, Integration of ALD tantalum nitride for copper metallization.
  108. Chung,Hua; Maity,Nirmalya; Yu,Jick; Mosely,Roderick Craig; Chang,Mei, Integration of ALD tantalum nitride for copper metallization.
  109. Chung, Hua; Chen, Ling; Yu, Jick; Chang, Mei, Integration of barrier layer and seed layer.
  110. Chung,Hua; Chen,Ling; Yu,Jick; Chang,Mei, Integration of barrier layer and seed layer.
  111. Simpson Cindy Reidsema, Interconnect structure in a semiconductor device and method of formation.
  112. Simpson Cindy Reidsema, Interconnect structure in a semiconductor device and method of formation.
  113. Cohen, Uri, Interconnect structures and methods for their fabrication.
  114. Sapre, Kedar; Ingle, Nitin; Tang, Jing, Intrench profile.
  115. Sapre, Kedar; Ingle, Nitin; Tang, Jing, Intrench profile.
  116. Nguyen, Son T.; Lubomirsky, Dmitry, Layered thin film heater and method of fabrication.
  117. Hsu, Ching-Mei; Ingle, Nitin K.; Hamana, Hiroshi; Wang, Anchuan, Low temperature gas-phase carbon removal.
  118. Farrar, Paul A., Mask on a polymer having an opening width less than that of the opening in the polymer.
  119. Purayath, Vinod R.; Thakur, Randhir; Ingle, Nitin K., Metal air gap.
  120. Cohen, Uri, Metallic interconnects products.
  121. Chen,B. Michelle; Shin,Ho Seon; Dordi,Yezdi; Morad,Ratson; Cheung,Robin, Method and apparatus for annealing copper films.
  122. Reid, Jonathan D.; Zhu, Huanfeng, Method and apparatus for filling interconnect structures.
  123. Reid, Jonathan D.; Zhu, Huanfeng, Method and apparatus for filling interconnect structures.
  124. Morad, Ratson; Shin, Ho Seon; Cheung, Robin; Kogan, Igor, Method and apparatus for heating and cooling substrates.
  125. Faust, Jr., Richard A.; Jiang, Qing-Tang; Lu, Jiong-Ping, Method and apparatus for improving adhesion between layers in integrated devices.
  126. Chen, Linlin; Wilson, Gregory J.; McHugh, Paul R.; Weaver, Robert A.; Ritzdorf, Thomas L., Method for electrochemically depositing metal on a semiconductor workpiece.
  127. Koos,Daniel A.; Mayer,Steven T.; Park,Heung L.; Cleary,Timothy Patrick; Mountsier,Thomas, Method for fabrication of semiconductor interconnect structure with reduced capacitance, leakage current, and improved breakdown voltage.
  128. Lopatin,Sergey; Shanmugasundram,Arulkumar; Lubomirsky,Dmitry; Pancham,Ian A., Method for forming CoWRe alloys by electroless deposition.
  129. Shue, Shau-Lin; Liang, Mong-Song, Method for forming a self-passivated copper interconnect structure.
  130. Matsubara Yoshihisa,JPX, Method for forming interconnection structure.
  131. Sywert H. Brongersma BE; Emmanuel Richard FR; Iwan Vervoort BE; Karen Maex BE, Method for improving the quality of a metal layer deposited from a plating bath.
  132. Ahn,Kie Y.; Forbes,Leonard, Method for making integrated circuits.
  133. Dubin, Valery, Method for making interconnects and diffusion barriers in integrated circuits.
  134. Hongo, Akihisa; Nagai, Mizuki; Ohno, Kanji; Kimizuka, Ryoichi; Maruyama, Megumi, Method for plating a first layer on a substrate and a second layer on the first layer.
  135. Chowdhury Rina ; Jain Ajay ; Adetutu Olubunmi, Method for protecting the edge exclusion of a semiconductor wafer from copper plating through use of an edge exclusion masking layer.
  136. Sergey D. Lopatin ; John A. Iacoponi, Method for ramped current density plating of semiconductor vias and trenches.
  137. Kao, Chien-Teh; Chou, Jing-Pei (Connie); Lai, Chiukin (Steven); Umotoy, Sal; Huston, Joel M.; Trinh, Son; Chang, Mei; Yuan, Xiaoxiong (John); Chang, Yu; Lu, Xinliang; Wang, Wei W.; Phan, See-Eng, Method for removing oxides.
  138. Liu Chung-Shi,TWX ; Yu Chen-Hua,TWX ; Bao Tien-I,TWX ; Jang Syun-Ming,TWX, Method for selective growth of Cu3Ge or Cu5Si for passivation of damascene copper structures and device manufactured thereby.
  139. Shau-Lin Shue TW, Method of copper barrier layer formation.
  140. Imran Hashim ; Hong-Mei Zhang ; John C. Forster, Method of depositing a copper seed layer which promotes improved feature surface coverage.
  141. Imran Hashim ; Hong-Mei Zhang ; John C. Forster, Method of depositing a copper seed layer which promotes improved feature surface coverage.
  142. Chih-Ming Huang TW; Tsu-An Lin TW, Method of fabricating Cu interconnects with reduced Cu contamination.
  143. Ko, Jungmin, Method of fin patterning.
  144. Ogure, Naoaki; Inoue, Hiroaki, Method of forming embedded copper interconnections and embedded copper interconnection structure.
  145. Minh Van Ngo ; Shekhar Pramanick ; Takeshi Nogami, Method of forming reliable capped copper interconnects.
  146. Ngo, Minh Van; Pramanick, Shekhar; Nogami, Takeshi, Method of forming reliable capped copper interconnects.
  147. Nogami Takeshi,JPX ; Brown Dirk D. ; Lopatin Sergey, Method of improving Cu damascene interconnect reliability by laser anneal before barrier polish.
  148. Chan Lap ; Zheng Jia Zhen,SGX, Method of making a copper interconnect with top barrier layer.
  149. Heon Do Kim KR, Method of manufacturing copper wiring in a semiconductor device.
  150. Besser, Paul R.; Zhao, Larry, Method of selectively alloying interconnect regions by deposition process.
  151. Chen,LinLin; Graham,Lyndon W.; Ritzdorf,Thomas L.; Fulton,Dakin; Batz, Jr.,Robert W., Method of submicron metallization using electrochemical deposition of recesses including a first deposition at a first current density and a second deposition at an increased current density.
  152. Mayer, Steven T.; Alexy, John B.; Feng, Jingbin, Methods and apparatus for airflow and heat management in electroless plating.
  153. Ahn, Kie Y.; Forbes, Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  154. Ahn, Kie Y.; Forbes, Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  155. Ahn,Kie Y.; Forbes,Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  156. Cohen, Uri, Methods and structures for interconnect passivation.
  157. Li, Zihui; Kao, Chia-Ling; Wang, Anchuan; Ingle, Nitin K., Methods for anisotropic control of selective silicon removal.
  158. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin, Methods for etch of SiN films.
  159. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin, Methods for etch of metal and metal-oxide films.
  160. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K., Methods for etch of metal and metal-oxide films.
  161. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin, Methods for etch of sin films.
  162. Ahn,Kie Y.; Forbes,Leonard, Methods for making copper and other metal interconnections in integrated circuits.
  163. Valery Dubin, Methods for making interconnects and diffusion barriers in integrated circuits.
  164. Hong, Sukwon; Hamana, Hiroshi; Liang, Jingmei, Methods of reducing substrate dislocation during gapfill processing.
  165. Collins,Dale W., Microelectronic workpiece for electrochemical deposition processing and methods of manufacturing and using such microelectronic workpieces.
  166. Mayer, Steven T.; Porter, David W., Modulated metal removal using localized wet etching.
  167. Ahn,Kie Y.; Forbes,Leonard, Multilevel copper interconnects with low-k dielectrics and air gaps.
  168. Ahn,Kie Y.; Forbes,Leonard, Multilevel copper interconnects with low-k dielectrics and air gaps.
  169. Cohen,Uri, Multiple seed layers for interconnects.
  170. Chen, Zhijun; Park, Seung; Korolik, Mikhail; Wang, Anchuan; Ingle, Nitin K., Non-local plasma oxide etch.
  171. Chen, Zhijun; Park, Seung; Korolik, Mikhail; Wang, Anchuan; Ingle, Nitin K., Non-local plasma oxide etch.
  172. Wang, Xikun; Liu, Jie; Wang, Anchuan; Ingle, Nitin K.; Anthis, Jeffrey W.; Schmiege, Benjamin, Oxide and metal removal.
  173. Chen, Zhijun; Wang, Anchuan; Ingle, Nitin K., Oxide etch selectivity enhancement.
  174. Chen, Zhijun; Wang, Anchuan; Ingle, Nitin K., Oxide etch selectivity enhancement.
  175. Xu, Lin; Chen, Zhijun; Wang, Anchuan; Nguyen, Son T., Oxide etch selectivity systems and methods.
  176. Lubomirsky, Dmitry, Oxygen compatible plasma source.
  177. Chen, Xinglong; Yang, Jang-Gyoo; Tam, Alexander; Tam, Elisha, Pedestal with multi-zone temperature control and multiple purge capabilities.
  178. Elliott, David J.; Thompson, Allan R.; Whitten, George D.; Camp, Jonathan C.; Krajewski, Mark T., Photocatalytic reactor system for treating flue effluents.
  179. Lubomirsky, Dmitry, Plasma processing system with direct outlet toroidal plasma source.
  180. Ingle, Nitin K.; Kachian, Jessica Sevanne; Xu, Lin; Park, Soonam; Wang, Xikun; Anthis, Jeffrey W., Plasma-free metal etch.
  181. Cho, Tae Seung; Sen, Yi-Heng; Park, Soonam; Lubomirsky, Dmitry, Polarity control for remote plasma.
  182. Choi, Tom; Ko, Jungmin; Kang, Sean, Poly directional etch by oxidation.
  183. Ramanathan, Sivakami; Padhi, Deenesh; Gandikota, Srinivas; Dixit, Girish A., Post rinse to improve selective deposition of electroless cobalt on copper for ULSI application.
  184. Zhang, Jingchun; Zhang, Hanshen, Procedure for etch rate consistency.
  185. Zhang, Jingchun; Zhang, Hanshen, Procedure for etch rate consistency.
  186. Lubomirsky, Dmitry; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Kovarsky, Nicolay Y.; Wijekoon, Kapila, Process for electroless copper deposition.
  187. Caubet, Pierre; Gregoire, Magali, Process for forming integrated circuit comprising copper lines.
  188. Mazurkiewicz, Jakub Henryk; Wallace, Gordon George; Innis, Charles Peter; Edwards, Scott A.; Murphy, Peter J.; Hall, Colin; Fabretto, Rick; Zuber, Kamil, Processes for producing electrochromic substrates and electrochromic articles made therefrom.
  189. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  190. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  191. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  192. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  193. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  194. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  195. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  196. Wang, Anchuan; Chen, Xinglong; Li, Zihui; Hamana, Hiroshi; Chen, Zhijun; Hsu, Ching-Mei; Huang, Jiayin; Ingle, Nitin K.; Lubomirsky, Dmitry; Venkataraman, Shankar; Thakur, Randhir, Processing systems and methods for halide scavenging.
  197. Naik, Mehul; Ma, Paul F.; Nemani, Srinivas D., Protective via cap for improved interconnect performance.
  198. Kobayashi, Satoru; Park, Soonam; Lubomirsky, Dmitry, Radial waveguide systems and methods for post-match control of microwaves.
  199. Kobayashi, Satoru; Park, Soonam; Lubomirsky, Dmitry; Sugai, Hideo, Radial waveguide systems and methods for post-match control of microwaves.
  200. Kobayashi, Satoru; Park, Soonam; Lubomirsky, Dmitry; Sugai, Hideo, Radial waveguide systems and methods for post-match control of microwaves.
  201. Kobayashi, Satoru; Park, Soonam; Lubomirsky, Dmitry; Sugai, Hideo, Radial waveguide systems and methods for post-match control of microwaves.
  202. Chen, Zhijun; Zhang, Jingchun; Hsu, Ching-Mei; Park, Seung; Wang, Anchuan; Ingle, Nitin K., Radical-component oxide etch.
  203. Chen, Zhijun; Zhang, Jingchun; Hsu, Ching-Mei; Park, Seung; Wang, Anchuan; Ingle, Nitin K., Radical-component oxide etch.
  204. Mayer, Steven T.; Porter, David W., Reduced isotropic etchant material consumption and waste generation.
  205. Mayer, Steven T.; Porter, David W., Reduced isotropic etchant material consumption and waste generation.
  206. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K., Remotely-excited fluorine and water vapor etch.
  207. Xu, Lin; Chen, Zhijun; Huang, Jiayin; Wang, Anchuan, Removal methods for high aspect ratio structures.
  208. Xu, Lin; Chen, Zhijun; Huang, Jiayin; Wang, Anchuan, Removal methods for high aspect ratio structures.
  209. Yang, Dongqing; Zhu, Lala; Wang, Fei; Ingle, Nitin K., Saving ion-damaged spacers.
  210. Elliott,David J.; Harte,Kenneth J.; Shephard,Larry E., Scanning plasma reactor.
  211. Cohen, Uri, Seed layers for metallic interconnects.
  212. Cohen, Uri, Seed layers for metallic interconnects and products.
  213. Chen, Zhijun; Huang, Jiayin; Wang, Anchuan; Ingle, Nitin, Selective SiN lateral recess.
  214. Wang, Xikun; Lei, Jianxin; Ingle, Nitin; Shaviv, Roey, Selective cobalt removal for bottom up gapfill.
  215. Ahn,Kie Y.; Forbes,Leonard, Selective electroless-plated copper metallization.
  216. Ingle, Nitin K.; Kachian, Jessica Sevanne; Xu, Lin; Park, Soonam; Wang, Xikun; Anthis, Jeffrey W., Selective etch for metal-containing materials.
  217. Ingle, Nitin K.; Kachian, Jessica Sevanne; Xu, Lin; Park, Soonam; Wang, Xikun; Anthis, Jeffrey W., Selective etch for metal-containing materials.
  218. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K., Selective etch for silicon films.
  219. Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K., Selective etch for silicon films.
  220. Wang, Anchuan; Zhang, Jingchun; Ingle, Nitin K.; Lee, Young S., Selective etch of silicon by way of metastable hydrogen termination.
  221. Wang, Anchuan; Zhang, Jingchun; Ingle, Nitin K.; Lee, Young S., Selective etch of silicon by way of metastable hydrogen termination.
  222. Chen, Zhijun; Li, Zihui; Wang, Anchuan; Ingle, Nitin K.; Venkataraman, Shankar, Selective etch of silicon nitride.
  223. Chen, Zhijun; Li, Zihui; Wang, Anchuan; Ingle, Nitin K.; Venkataraman, Shankar, Selective etch of silicon nitride.
  224. Citla, Bhargav; Ying, Chentsau; Nemani, Srinivas; Babayan, Viachslav; Stowell, Michael, Selective etch using material modification and RF pulsing.
  225. Wang, Xikun; Ingle, Nitin, Selective in situ cobalt residue removal.
  226. Hoinkis, Mark; Miyazoe, Hiroyuki; Joseph, Eric, Selective sputtering for pattern transfer.
  227. Wang, Yunyu; Wang, Anchuan; Zhang, Jingchun; Ingle, Nitin K.; Lee, Young S., Selective suppression of dry-etch rate of materials containing both silicon and nitrogen.
  228. Wang, Yunyu; Wang, Anchuan; Zhang, Jingchun; Ingle, Nitin K.; Lee, Young S., Selective suppression of dry-etch rate of materials containing both silicon and oxygen.
  229. Liu, Jie; Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K.; Park, Seung; Chen, Zhijun; Hsu, Ching-Mei, Selective titanium nitride etching.
  230. Liu, Jie; Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K.; Park, Seung; Chen, Zhijun; Hsu, Ching-Mei, Selective titanium nitride etching.
  231. Wang, Xikun; Wang, Anchuan; Ingle, Nitin K.; Lubomirsky, Dmitry, Selective titanium nitride removal.
  232. Wang, Xikun; Wang, Anchuan; Ingle, Nitin K.; Lubomirsky, Dmitry, Selective titanium nitride removal.
  233. Wang, Xikun; Ingle, Nitin, Selective tungsten removal.
  234. Pandit, Mandar B.; Wang, Anchuan; Ingle, Nitin K., Self-aligned process.
  235. Dubin Valery, Self-encapsulated copper metallization.
  236. Arnepalli, Ranga Rao; Goradia, Prerna Sonthalia; Visser, Robert Jan; Ingle, Nitin; Korolik, Mikhail; Biswas, Jayeeta; Lodha, Saurabh, Self-limiting atomic thermal etching systems and methods.
  237. Shue,Shau Lin; Liang,Mong Song, Self-passivated copper interconnect structure.
  238. Takagi Mariko,JPX, Semiconductor apparatus and manufacturing method therefor.
  239. Sakamoto, Toshitsugu; Kawaura, Hisao; Baba, Toshio; Nihey, Fumiyuki; Ochiai, Yukinori; Hongo, Hiroo, Semiconductor device and its manufacturing method.
  240. Amano, Mari; Tada, Munehiro; Hayashi, Yoshihiro, Semiconductor device and method of fabricating the same.
  241. Jiang,Qing Tang; Jin,Changming; Luttmer,Joseph D., Semiconductor device with a conductive layer including a copper layer with a dopant.
  242. Oshida, Daisuke; Takewaki, Toshiyuki; Yokogawa, Shinji, Semiconductor device with high reliability and manufacturing method thereof.
  243. Jiang, Qing-Tang; Jin, Changming; Luttmer, Joseph D., Semiconductor devices and methods of manufacturing such semiconductor devices.
  244. Pramanick Shekhar ; Brown Dirk ; Nogami Takeshi, Semiconductor interconnect interface processing by pulse laser anneal.
  245. Lubomirsky, Dmitry; Chen, Xinglong; Venkataraman, Shankar, Semiconductor processing systems having multiple plasma configurations.
  246. Yang, Jang-Gyoo; Chen, Xinglong; Park, Soonam; Baek, Jonghoon; Garg, Saurabh; Venkataraman, Shankar, Semiconductor processing with DC assisted RF power for improved control.
  247. Yang, Jang-Gyoo; Chen, Xinglong; Park, Soonam; Baek, Jonghoon; Garg, Saurabh; Venkataraman, Shankar, Semiconductor processing with DC assisted RF power for improved control.
  248. Dallmann, Gerald; Rosslau, Heike; Urbansky, Norbert; Wallace, Scott, Semiconductor structure having metal oxide or nirtride passivation layer on fill layer and method for making same.
  249. Nguyen, Andrew; Ramaswamy, Kartik; Nemani, Srinivas; Howard, Bradley; Vishwanath, Yogananda Sarode, Semiconductor system assemblies and methods of operation.
  250. Komobuchi, Hiroyoshi; Kubo, Minoru; Hashimoto, Masahiko; Okajima, Michio; Yamamoto, Shinichi, Semiconductor-based encapsulated infrared sensor and electronic device.
  251. Lu, Jiong-Ping; Hsu, Wei-Yung; Hong, Qi-Zhong; Faust, Richard A., Si-rich surface layer capped diffusion barriers.
  252. Ko, Jungmin; Choi, Tom; Ingle, Nitin; Kim, Kwang-Soo; Wou, Theodore, SiN spacer profile patterning.
  253. Park, Seung; Wang, Anchuan, Silicon etch process with tunable selectivity to SiO2 and other materials.
  254. Korolik, Mikhail; Ingle, Nitin K.; Wang, Anchuan; Xu, Jingjing, Silicon germanium processing.
  255. Chen, Zhijun; Wang, Anchuan; Ingle, Nitin K., Silicon oxide selective removal.
  256. Huang, Jiayin; Chen, Zhijun; Wang, Anchuan; Ingle, Nitin, Silicon pretreatment for nitride removal.
  257. Li, Zihui; Hsu, Ching-Mei; Zhang, Hanshen; Zhang, Jingchun, Silicon selective removal.
  258. Chen, Zhijun; Zhang, Jingchun; Wang, Anchuan; Ingle, Nitin K., Silicon-carbon-nitride selective etch.
  259. Lopatin,Sergey D.; Shanmugasundrum,Arulkumar; Shacham Diamand,Yosef, Silver under-layers for electroless cobalt alloys.
  260. Kim, Hun Sang; Choi, Jinhan; Koseki, Shinichi, Simplified litho-etch-litho-etch process.
  261. Miller, Anne E., Slurry for polishing a barrier layer.
  262. Fork, David K.; Hantschel, Thomas, Solar cell with high aspect ratio gridlines supported between co-extruded support structures.
  263. Luere, Olivier; Kang, Sean S.; Nemani, Srinivas D., Spacer formation.
  264. Farrar, Paul A., Structures and methods to enhance copper metallization.
  265. Farrar, Paul A., Structures and methods to enhance copper metallization.
  266. Farrar, Paul A., Structures and methods to enhance copper metallization.
  267. Farrar,Paul A., Structures and methods to enhance copper metallization.
  268. Farrar,Paul A., Structures and methods to enhance copper metallization.
  269. Chen, Linlin; Graham, Lyndon W.; Ritzdorf, Thomas L.; Fulton, Dakin; Batz, Jr., Robert W., Submicron metallization using electrochemical deposition.
  270. Zhuang Wei-Wei ; Charneski Lawrence J. ; Hsu Sheng Teng, Substituted phenylethylene precursor deposition method.
  271. Hongo, Akihisa; Nagai, Mizuki; Ohno, Kanji; Kimizuka, Ryoichi; Maruyama, Megumi, Substrate plating method and apparatus.
  272. Carole D. Graas DE; Robert H. Havemann, Surface modified interconnects.
  273. Graas, Carole D.; Havemann, Robert H., Surface modified interconnects.
  274. Ivanov, Igor C., Systems and methods affecting profiles of solutions dispensed across microelectronic topographies during electroless plating processes.
  275. Benjaminson, David; Lubomirsky, Dmitry, Thermal management systems and methods for wafer processing systems.
  276. Wang, Xikun; Pandit, Mandar; Wang, Anchuan; Ingle, Nitin K., Titanium nitride removal.
  277. Wang, Xikun; Xu, Lin; Wang, Anchuan; Ingle, Nitin K., Titanium oxide etch.
  278. Mayer, Steven T.; Rea, Mark L.; Hill, Richard S.; Kepten, Avishai; Stowell, R. Marshall; Webb, Eric G., Topography reduction and control by selective accelerator removal.
  279. Liu, Jie; Wang, Xikun; Park, Seung; Korolik, Mikhail; Wang, Anchuan; Ingle, Nitin K., Tungsten oxide processing.
  280. Wang, Xikun; Liu, Jie; Wang, Anchuan; Ingle, Nitin K., Tungsten separation.
  281. Reid, Jonathan; Park, Seyang; Varadarajan, Seshasayee; Doubina, Natalia, Two step process for uniform across wafer deposition and void free filling on ruthenium coated wafers.
  282. Ying-Ho Chen TW; Syun-Ming Jang TW, Two-stage Cu anneal to improve Cu damascene process.
  283. Wang, Xikun; Wang, Anchuan; Ingle, Nitin K., V trench dry etch.
  284. Liu, Jie; Purayath, Vinod R.; Wang, Xikun; Wang, Anchuan; Ingle, Nitin K., Vertical gate separation.
  285. Mayer, Steven T.; Webb, Eric G.; Porter, David W., Wet etching methods for copper removal and planarization in semiconductor processing.
  286. Mayer, Steven T.; Webb, Eric; Porter, David W., Wet etching methods for copper removal and planarization in semiconductor processing.
  287. Mayer, Steven T.; Webb, Eric; Porter, David W., Wet etching methods for copper removal and planarization in semiconductor processing.
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