초록 ▼

A spreading code generator generates a spreading code by modulo-two addition of two internal spreading codes. The first internal spreading code is part of a pseudorandom noise sequence, created by resetting a pseudorandom noise generator to an assigned initial state at intervals determined by counti

A spreading code generator generates a spreading code by modulo-two addition of two internal spreading codes. The first internal spreading code is part of a pseudorandom noise sequence, created by resetting a pseudorandom noise generator to an assigned initial state at intervals determined by counting a framing signal. The second spreading code is selected from a set of preferably orthogonal sequences, the selected sequence being repeated at intervals shorter than the period of the framing signal. A code-division multiple-access communication system employs this spreading code generator to generate all spreading codes used at all communicating stations. One of the spreading codes generated at each station is transmitted as a synchronization signal.

대표청구항 ▼

[ What is claimed is:] [1.] A spreading code generator for generating a spreading code responsive to initialization data and a control parameter, in synchronization with a chip clock signal and a framing signal, comprising:a first spreading code generating circuit for generating a first spreading co

[ What is claimed is:] [1.] A spreading code generator for generating a spreading code responsive to initialization data and a control parameter, in synchronization with a chip clock signal and a framing signal, comprising:a first spreading code generating circuit for generating a first spreading code in synchronization with said chip clock signal, starting from an initial state determined by said initialization data, and reassuming said initial state at intervals equal to a fixed integer multiple of one period of said framing signal;a second spreading code generating circuit for repeatedly generating a second spreading code in synchronization with said chip clock signal, said second spreading code being selected by said control parameter and having a period shorter than a period of said framing signal; anda modulo-two adder coupled to said first spreading code generating circuit and said second spreading code generating circuit, for performing a modulo-two summing operation on said first spreading code and said second spreading code, thereby producing a third spreading code for output from said spreading code generator.