초록 ▼

A biasing circuit for a power amplifier, for use in a transmitter, that substantially reduces distortion during key-up and thereby reduces key-up time. The power amplifier includes an output transistor and a bias circuit. The bias circuit is applied to all the class AB stages of the power amplifier.

A biasing circuit for a power amplifier, for use in a transmitter, that substantially reduces distortion during key-up and thereby reduces key-up time. The power amplifier includes an output transistor and a bias circuit. The bias circuit is applied to all the class AB stages of the power amplifier. The bias circuit provides to the output transistor a first bias level during the preheat period and a second bias level during the transmit period. This first bias level is predetermined to cause the output transistor to reach the steady-state junction temperature achieved by the output transistor during the transmit period (i.e., when transmitting output signals biased with the second bias level). The preheat period ends when this steady-state temperature is reached. Thus, the power amplifier can then transition to a transmit period having already reached the steady-state junction temperature. Because the output transistor is already heated to the steady-state junction temperature, "thermal" distortion (i.e., the distortion incurred when the output transistor's junction temperature changes while transmitting) is avoided and the key-up time is reduced.

대표청구항 ▼

[ The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:] [1.] A power amplifier for use in a transmitter, the power amplifier comprising:an output transistor having an input lead and an output lead; anda bias circuit coupled to said input lea

[ The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:] [1.] A power amplifier for use in a transmitter, the power amplifier comprising:an output transistor having an input lead and an output lead; anda bias circuit coupled to said input lead of said output transistor, wherein said bias circuit is configured to provide a first bias level to said output transistor when said transmitter is operating in a preheat period and to provide a second bias level when said transmitter is transmitting in a transmit period, wherein said output transistor is operative to generate substantially equal heat in said preheat period and said transmit period.