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Method and apparatus for regulating the voltage supplied to an integrated circuit 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-017/00
출원번호 US-0724173 (1996-09-30)
발명자 / 주소
  • Nguyen Don J.
  • Noble James L.
출원인 / 주소
  • Intel Corporation
대리인 / 주소
    Kaplan
인용정보 피인용 횟수 : 67  인용 특허 : 3

초록 ▼

A method and apparatus for regulating a voltage supplied by a power supply to an integrated circuit. A signal is sent to the power supply. This signal signifies that a change in the current drawn by the integrated circuit from the power supply will occur. Next, the voltage supplied by the power supp

대표청구항 ▼

[ What is claimed is:] [1.] A method for regulating a voltage supplied by a power supply to an integrated circuit comprising:sending a first signal to the power supply to signify that current drawn by the integrated circuit from the power supply will increase;raising the voltage supplied by the powe

이 특허에 인용된 특허 (3)

  1. Call David E. (Tucson AZ) Jaquette Glen A. (Tucson AZ) Lewkowicz Julian (Tucson AZ), Compensated laser drive circuit.
    상세보기
  2. Huykman Richard B. (Montville NJ), Pulse width modulated power supply operative over an extended input power range without output power dropout.
    상세보기
  3. Lange Gerhard G. (Apalachin NY) Walters Michael M. (Endwell NY), Standby boost converter.
    상세보기

이 특허를 인용한 특허 (67)

  1. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
    상세보기
  2. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
    상세보기
  3. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
    상세보기
  4. Katoh,Takayuki; Kawano,Seiichi; Oka,Kenji; Yoshiyama,Noritishi, Apparatus for switching between a combination of operating modes such that the power consumed is reduced relative to the time of switching.
    상세보기
  5. Beard, Paul, Battery powered device with dynamic power and performance management.
    상세보기
  6. Gazdzinski, Robert F., Computerized apparatus with ingestible probe.
    상세보기
  7. Gazdzinski, Robert F., Computerized information collection and processing apparatus.
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  8. Gazdzinski, Robert F., Computerized information collection and processing apparatus.
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  9. Gazdzinski, Robert F., Computerized information collection and processing apparatus and methods.
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  10. Takayanagi, Toshinari; Cho, Jung Wook; McNamara, Patrick D., Control scheme to temporarily raise supple voltage in response to sudden change in current demand.
    상세보기
  11. Takayanagi, Toshinari; Cho, Jung Wook; McNamara, Patrick D., Control scheme to temporarily raise supply voltage in response to sudden change in current demand.
    상세보기
  12. Blatt,Miriam G.; Greenhill,David J.; Gauthier,Claude R.; Aingaran,Kathirgamar, Data analysis techniques for dynamic power simulation of a CPU.
    상세보기
  13. Lovisotto, Giuliano; Dorigo, Hubert; De Luca, Fernando, Device for reducing standby-mode energy consumption of an electric household appliance.
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  14. Lovisotto, Giuliano, Electric household appliance and method for reducing stand-by state energy consumption using a switching mode low power supply unit.
    상세보기
  15. Lovisotto, Giuliano, Electronic control device and method for reducing stand-by state energy consumption of an electric household appliance.
    상세보기
  16. Chen, Yen-Ming; Wang, Wei-Lu, Electronic device having complete power-saving mechanism.
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  17. Gazdzinski, Robert F., Endoscopic smart probe.
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  18. Diefenbaugh,Paul; Huang,Lilly, Enhancing power delivery with transient running average power limits.
    상세보기
  19. Calhoun, Franklin; Daniel, Allan Wayne, Field-installable pulling eye.
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  20. Calhoun, Franklin; Daniel, Allan Wayne, Field-installable pulling eye.
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  21. Lovisotto, Giuliano; Dorigo, Hubert; De Luca, Fernando, Household appliance circuit arrangement.
    상세보기
  22. Saisho, Kazuya, Information processing apparatus and control method for information processing apparatus.
    상세보기
  23. Gazdzinski, Robert F., Ingestible probe with agent delivery.
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  24. Carlson, John R.; McCardel, David Brian; Cooper, David A.; Mercier, David; Daniel, Allan W.; Andrea, Timothy M., Integrated systems facilitating wire and cable installations.
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  25. Carlson, John R.; McCardel, David Brian; Cooper, David A.; Mercier, David; Daniel, Allan W.; Andrea, Timothy M., Integrated systems facilitating wire and cable installations.
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  26. Carlson, John R.; McCardel, David Brian; Cooper, David A.; Mercier, David; Sasse, Philip; Daniel, Allan W.; Andrea, Timothy M., Integrated systems facilitating wire and cable installations.
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  27. Carlson, John R.; McCardel, David Brian; Cooper, David A.; Mercier, David; Sasse, Philip; Daniel, Allan W.; Andrea, Timothy M., Integrated systems facilitating wire and cable installations.
    상세보기
  28. Carlson, John R.; McCardel, David Brian; Cooper, David A.; Mercier, David; Sasse, Philip; Daniel, Allan W.; Andrea, Timothy M.; Gonzalez, Juan Alberto Galindo; Bardin, Timmothy R., Integrated systems facilitating wire and cable installations.
    상세보기
  29. Signorini,Karen, MRAM sense layer isolation.
    상세보기
  30. Signorini,Karen, MRAM sense layer isolation.
    상세보기
  31. Reddy, Sreenivas Aerra; Arulanandam, Srinivasan; Rajaraman, Venkataraman, Maintaining optimum voltage supply to match performance of an integrated circuit.
    상세보기
  32. Hsu,Pochang; Nguyen,Don J., Method and apparatus for configuring a voltage regulator based on current information.
    상세보기
  33. Mayo, Robert Nelson; Hamburgen, William Riis, Method and apparatus for reducing battery power consumption of transceivers in a communications network using an external generated timing signal.
    상세보기
  34. Nguyen, Don J.; Hsu, Pochang; Jackson, Robert T.; Horigan, John W., Method and apparatus for reducing the power consumed by a computer system.
    상세보기
  35. Nguyen,Don J.; Hsu,Pochang; Jackson,Robert T.; Horigan,John W., Method and apparatus for reducing the power consumed by a computer system.
    상세보기
  36. Huang, Jensen; Diard, Franck; Saulters, Scott, Method and system for artificially and dynamically limiting the framerate of a graphics processing unit.
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  37. Frech, Roland; Huber, Andreas; Klink, Erich; Supper, Jochen, Method and system for quantifying the integrity of an on-chip power supply network.
    상세보기
  38. Tang, Benjamim, Method, apparatus and system for predictive power regulation to a microelectronic circuit.
    상세보기
  39. Diard, Franck; Kadaba, Ganesh, Methods and system for artifically and dynamically limiting the display resolution of an application.
    상세보기
  40. Gazdzinski, Robert F., Methods of processing data obtained from medical device.
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  41. Gazdzinski, Robert F., Methods of processing data obtained from medical device.
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  42. Hart,Frank P.; Nguyen,Don J., Multiple voltage regulators for use with a single load.
    상세보기
  43. Liu, Harry; Berg, Lonny; Larson, William L; Li, Shaoping; Zhu, Theodore; Drewes, Joel, Passivated magneto-resistive bit structure.
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  44. Harry Liu ; Lonny Berg ; William L. Larson ; Shaoping Li ; Theodore Zhu ; Joel Drewes, Passivated magneto-resistive bit structure and passivation method therefor.
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  45. Liu, Harry; Berg, Lonny; Larson, William L.; Li, Shaoping; Zhu, Theodore; Drewes, Joel, Passivated magneto-resistive bit structure and passivation method therefor.
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  46. Liu,Harry; Berg,Lonny; Larson,William L.; Li,Shaoping; Zhu,Theodore; Drewes,Joel, Passivated magneto-resistive bit structure and passivation method therefor.
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  47. Watanabe, Mitsuhiro, Personal data assistant terminal with radio.
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  48. Li, Sau Yan Keith; Dewey, Thomas Edward; Jamkar, Saket Arun; Parikh, Amit, Power consumption reduction systems and methods.
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  49. Frid, Aleksandr; Sriram, Parthasarathy, Power management with dynamic frequency adjustments.
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  50. Frid, Aleksandr; Sriram, Parthasarathy, Power management with dynamic frequency adjustments.
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  51. Hineman, Max; Signorini, Karen; Howard, Brad J., Protective layers for MRAM devices.
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  52. Hineman,Max; Signorini,Karen; Howard,Brad J., Protective layers for MRAM devices.
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  53. Lougee,Eldin, Regulator for reducing power supply transient voltages.
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  54. Johnson, Scott R.; Canova, Francis J.; Lunsford, Eric M.; Twyman, Nicholas; Osborne, Neal A., Software-based voltage detection to reserve device power upon shutdown.
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  55. Johnson,Scott R.; Canova,Francis J.; Lunsford,Eric M.; Twyman,Nicholas; Osborne,Neal A., Software-based voltage detection to reserve device power upon shutdown.
    상세보기
  56. Lam, Son H.; Dibene, II, Joseph T.; Koertzen, Henry W.; Patzer, Steven D., Supply voltage control based at least in part on power state of integrated circuit.
    상세보기
  57. Lam, Son H.; Dibene, II, Joseph T.; Koertzen, Henry W.; Patzer, Steven D., Supply voltage control based at least in part on power state of integrated circuit.
    상세보기
  58. Lam, Son H.; Dibene, II, Joseph T.; Koertzen, Henry W.; Patzer, Steven D., Supply voltage control based at least in part on power state of integrated circuit.
    상세보기
  59. Drewes,Joel A.; Deak,James G., System and method for reducing shorting in memory cells.
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  60. Drewes,Joel A.; Deak,James G., System and method for reducing shorting in memory cells.
    상세보기
  61. Carlson, John R.; McCardel, David Brian; Cooper, David A.; Mercier, David; Daniel, Allan W.; Andrea, Timothy M., Systems and methods for facilitating wire and cable installations.
    상세보기
  62. Atkinson,Lee W, Systems and methods for transitioning a CPU from idle to active.
    상세보기
  63. Sakaguchi, Hideaki, Testing device and testing method for semiconductor integrated circuits.
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  64. Nguyen, Don J., Voltage regulation for a computer system.
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  65. Nguyen, Don J., Voltage regulation for a computer system providing voltage positioning for multi-component load.
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  66. Nguyen, Don J., Voltage regulation for a computer system providing voltage positioning for multi-component load.
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  67. Nguyen, Don J., Voltage regulation for computer system components that increases voltage level when a component enters a sleep state as indicated by a power state status signal.
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