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Method and apparatus for priority based scheduling of wafer processing within a multiple chamber semiconductor wafer pr 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/77
  • H01L-021/02
출원번호 US-0735370 (1996-10-21)
발명자 / 주소
  • Jevtic Dusan
출원인 / 주소
  • Applied Materials, Inc.
대리인 / 주소
    Thomason & Moser
인용정보 피인용 횟수 : 168  인용 특허 : 5

초록

Apparatus and concomitant method for performing priority based scheduling of wafer processing within a multiple chamber semiconductor wafer processing system (cluster tool). The sequencer assigns priority values to the chambers in a cluster tool, then moves wafers from chamber to chamber in accordan

대표청구항

[ What is claimed is:] [1.] A method for scheduling semiconductor wafers for processing within a multiple chamber, semiconductor wafer processing system having a plurality of chambers, said method comprising:assigning a priority to each chamber in said plurality of chambers;selecting a chamber havin

이 특허에 인용된 특허 (5)

  1. Kiriseko Tadashi (Kanagawa JPX) Tani Hiromichi (Kawasaki JPX) Soma Noriko (Yokohama JPX) Shigemi Nobuhisa (Kawasaki JPX) Toyoda Takayuki (Yokkaichi JPX), Continuous semiconductor substrate processing system.
  2. Hara Kenjiro (Yokohama JPX) Kajio Atsunori (Kawasaki JPX), Manufacturing management and apparatus for a semiconductor device.
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  4. Kline Paul J. (Richardson TX), Scheduling for multi-task manufacturing equipment.
  5. Takahashi Nobuyuki (Fuchu JPX) Kitahara Hiroaki (Fuchu JPX), Substrate processing apparatus.

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