초록 ▼

A voltage regulator having improved noise immunity includes a reference counter, a digital reference generator coupled to the reference generator, a comparator coupled to the digital reference generator, a load response control circuit coupled to the comparator output, a digital pulse width memory c

A voltage regulator having improved noise immunity includes a reference counter, a digital reference generator coupled to the reference generator, a comparator coupled to the digital reference generator, a load response control circuit coupled to the comparator output, a digital pulse width memory circuit coupled the load response control output, and a digital pulse width timer circuit coupled to the pulse width memory output and to the load response control circuit, wherein the digital pulse width timer circuit and the digital pulse width memory circuit each have greater digital resolution than the digital reference generator.

대표청구항 ▼

[ What is claimed is:] [1.] A voltage regulator circuit for controlling the voltage of level of an electrical system, the voltage regulator comprising:a reference counter for producing a binary output stream;a reference generator coupled to said reference counter, said reference generator converting

[ What is claimed is:] [1.] A voltage regulator circuit for controlling the voltage of level of an electrical system, the voltage regulator comprising:a reference counter for producing a binary output stream;a reference generator coupled to said reference counter, said reference generator converting said binary stream to a reference signal;a comparator having a sampled signal input for monitoring the voltage level of the electrical system, a second input for receiving said reference signal, and an output, said comparator producing a pulse width modulated signal having a first duty cycle period;a pulse width timer circuit for transmitting a termination signal at a predefined termination time; anda load response control circuit having a signal input coupled to said comparator, a control input coupled to said pulse width timer, and a signal output, said load response control circuit receiving said pulse width modulated signal and said termination signal, wherein if said termination signal is received before the conclusion of said first duty cycle period, said load response control circuit truncates said first duty cycle period to end at said termination time, wherein said pulse width timer has greater digital resolution than said reference generator.