초록 ▼

Apparatus is disclosed for asynchronously controlling a pipeline. The control circuitry includes an alternating chain of control circuits and detection circuits. When a full control circuit precedes an empty control circuit in the chain, indicating that the data storage element corresponding to the

Apparatus is disclosed for asynchronously controlling a pipeline. The control circuitry includes an alternating chain of control circuits and detection circuits. When a full control circuit precedes an empty control circuit in the chain, indicating that the data storage element corresponding to the full control circuit should transfer its data to the next storage element corresponding to the empty control circuit, the detection circuit generates a "move" signal. The "move" signal sets the preceding control circuit to empty and the following control circuit to full, thereby enabling movement of a data element from the preceding to the following stage. Because the control circuits are relatively simple and have predictable signal propagation times, the relative reactions of two adjacent control circuits to the common move signal can be tightly controlled. The control circuitry may control a counterflow pipeline, a forking pipeline, or a merging pipeline.

대표청구항 ▼

[ What is claimed is:] [1.] Circuitry for controlling an asynchronous pipeline including a plurality of stages, comprising:a first control circuit controlling a transfer state of a first one of the plurality of stages;a second control circuit controlling a transfer state of a second one of the plura

[ What is claimed is:] [1.] Circuitry for controlling an asynchronous pipeline including a plurality of stages, comprising:a first control circuit controlling a transfer state of a first one of the plurality of stages;a second control circuit controlling a transfer state of a second one of the plurality of stages, serially coupled to the first stage;a detection circuit connected to outputs of the first and second control circuits and generating a move signal for monitoring the transfer states of the first and second control circuits based on the outputs of the first and second control circuits, the move signal being received by the first and second control circuits;a first inverter connected between the first control circuit and the detection circuit; anda second inverter connected between the second control circuit and the detection circuit.