$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Method for fabricating semiconductor wafers

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/76
출원번호 US-0929793 (1997-09-15)
우선권정보 KR-0056895 (1996-11-23)
발명자 / 주소
  • Lee Sahng Kyoo,KRX
  • Park Sang Kyun,KRX
출원인 / 주소
  • Hyundai Electronics Industries Co., Ltd., KRX
대리인 / 주소
    Thelen Reid & Priest, L.L.P.
인용정보 피인용 횟수 : 140  인용 특허 : 7

초록

A method for fabricating silicon-on-insulator (SOI) wafers which is capable of simplifying the fabrication process while improving the productivity of SOI wafers. In accordance with this method, a first wafer formed with a thermal oxide film is bonded to a second wafer formed with an oxygen ion-impl

대표청구항

[ What is claimed is:] [1.] A method for fabricating semiconductor wafers, comprising the steps of:providing a first wafer and a second wafer;forming a thermal oxide film over the first wafer;implanting oxygen ions in the second wafer, thereby forming an oxygen ion-implanted region;implanting hydrog

이 특허에 인용된 특허 (7)

  1. Bruel Michel (Veurey FRX), Method for placing semiconductive plates on a support.
  2. Brady Frederick T. (Chantilly VA) Haddad Nadim F. (Oakton VA), Method to radiation harden the buried oxide in silicon-on-insulator structures.
  3. Bruel Michel,FRX, Process for the manufacture of thin films of semiconductor material.
  4. Bruel Michel (Veurey FRX), Process for the production of a relief structure on a semiconductor material support.
  5. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
  6. Kikuchi Hiroaki (Tokyo JPX), Semiconductor substrate having a silicon-on-insulator structure and method of fabricating the same.
  7. Foerstner Juergen A. (Mesa AZ) Hughes Henry G. (Scottsdale AZ) D\Aragona Frank S. (Scottsdale AZ), Silicon film with improved thickness control.

이 특허를 인용한 특허 (140)

  1. Henley Francois J. ; Cheung Nathan W., Cleaved silicon thin film with rough surface.
  2. Francois J. Henley ; Michael A. Brayan ; William G. En, Cleaving process to fabricate multilayered substrates using low implantation doses.
  3. Henley,Francois J.; Bryan,Michael A.; En,William G., Cleaving process to fabricate multilayered substrates using low implantation doses.
  4. Francois J. Henley ; Nathan Cheung, Controlled cleavage process and device for patterned films.
  5. Henley, Francois J.; Cheung, Nathan, Controlled cleavage process and device for patterned films.
  6. Francois J. Henley ; Nathan W. Cheung, Controlled cleavage process and resulting device using beta annealing.
  7. Henley Francois J. ; Cheung Nathan W., Controlled cleavage process and resulting device using beta annealing.
  8. Henley Francois J. ; Cheung Nathan W., Controlled cleavage process using patterning.
  9. Henley, Francois J.; Cheung, Nathan, Controlled cleavage process using pressurized fluid.
  10. Henley Francois J. ; Cheung Nathan, Controlled cleavage system using pressurized fluid.
  11. Henley, Francois J.; Cheung, Nathan W., Controlled cleaving process.
  12. Henley,Francois J.; Cheung,Nathan W., Controlled cleaving process.
  13. Henley,Francois J.; Cheung,Nathan W., Controlled cleaving process.
  14. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  15. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  16. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  17. Henley,Francois J.; Cheung,Nathan W., Controlled process and resulting device.
  18. Gonzalez, Fernando; Beaman, Kevin L.; Moore, John T.; Weimer, Ron, DRAM cell constructions.
  19. Gonzalez, Fernando; Beaman, Kevin L.; Moore, John T.; Weimer, Ron, DRAM cell constructions.
  20. Fernando Gonzalez ; Kevin L. Beaman ; John T. Moore ; Ron Weimer, DRAM cell constructions, and methods of forming DRAM cells.
  21. Aspar, Bernard; Moriceau, Hubert; Zussy, Marc; Rayssac, Olivier, Detachable substrate or detachable structure and method for the production thereof.
  22. Henley Francois J. ; Cheung Nathan, Device for patterned films.
  23. Gan,Hock; Sarkar,Pallab; Kohler,Darren, Disaster recovery for very large GSM/UMTS HLR databases.
  24. Henley Francois J. ; Cheung Nathan W., Economical silicon-on-silicon hybrid wafer assembly.
  25. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  26. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  27. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  28. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  29. Nathan W. Cheung ; Francois J. Henley, Generic layer transfer methodology by controlled cleavage process.
  30. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.
  31. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.
  32. Joly, Jean-Pierre; Ulmer, Laurent; Parat, Guy, Integrated circuit on high performance chip.
  33. Okonogi Kensuke,JPX, Laminated SOI substrate and producing method thereof.
  34. Henley, Francois J., Layer transfer of films utilizing controlled propagation.
  35. Henley, Francois J., Layer transfer of films utilizing controlled shear region.
  36. Gonzalez, Fernando; Zahurak, John K., Localized biasing for silicon on insulator structures.
  37. Gonzalez, Fernando; Zahurak, John K., Localized biasing for silicon on insulator structures.
  38. Gonzalez, Fernando; Zahurak, John K., Localized biasing for silicon on insulator structures.
  39. Gonzalez, Fernando; Zahurak, John K., Localized biasing for silicon on insulator structures.
  40. Miyairi, Hidekazu, Manufacturing method of semiconductor device on cavities.
  41. Francois J. Henley ; Nathan W. Cheung, Method and device for controlled cleaving process.
  42. Henley Francois J. ; Cheung Nathan, Method and device for controlled cleaving process.
  43. Henley Francois J. ; Cheung Nathan W., Method and device for controlled cleaving process.
  44. Henley, Francois J.; Cheung, Nathan W., Method and device for controlled cleaving process.
  45. Henley,Francois J.; Cheung,Nathan, Method and device for controlled cleaving process.
  46. Henley, Francois J., Method and structure for fabricating solar cells using a thick layer transfer process.
  47. Fournel, Franck; Moriceau, Hubert; Lagahe, Christelle, Method for making a stressed structure designed to be dissociated.
  48. Deguet, Chrystel; Clavelier, Laurent, Method for making a thin-film element.
  49. Aspar, Bernard; Lagahe, Christelle; Ghyselen, Bruno, Method for making thin layers containing microcomponents.
  50. Kakehata, Tetsuya; Kuriki, Kazutaka, Method for manufacturing SOI substrate.
  51. Kakehata, Tetsuya; Kuriki, Kazutaka, Method for manufacturing SOI substrate.
  52. Shimomura, Akihisa; Koyama, Masaki; Higa, Eiji, Method for manufacturing SOI substrate.
  53. Tauzin, Aurélie; Dechamp, Jérôme; Mazen, Frédéric; Madeira, Florence, Method for preparing thin GaN layers by implantation and recycling of a starting substrate.
  54. Yoshida, Kazuhiko; Matsumine, Masao; Takeno, Hiroshi, Method for producing SOI wafer.
  55. Murakami, Satoshi; Morimoto, Nobuyuki; Nishihata, Hideki; Endo, Akihiko, Method for producing semiconductor substrate.
  56. Murakami, Satoshi; Morimoto, Nobuyuki; Nishihata, Hideki; Endo, Akihiko, Method for producing semiconductor substrate.
  57. Moriceau, Hubert; Lagahe, Chrystelle; Bataillou, Benoit, Method for production of a very thin layer with thinning by means of induced self-support.
  58. Nguyen, Nguyet-Phuong; Cayrefourcq, Ian; Lagahe-Blanchard, Christelle; Bourdelle, Konstantin; Tauzin, Aurélie; Fournel, Franck, Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation.
  59. Nguyen, Nguyet-Phuong; Cayrefourcq, Ian; Lagahe-Blanchard, Christelle, Method of catastrophic transfer of a thin film after co-implantation.
  60. Doyle Brian S., Method of delaminating a pre-fabricated transistor layer from a substrate for placement on another wafer.
  61. Doyle, Brian S., Method of delaminating a pre-fabricated transistor layer from a substrate for placement on another wafer.
  62. Cayrefourcq,Ian; Mohamed,Nadia Ben; Lagahe Blanchard,Christelle; Nguyen,Nguyet Phuong, Method of detaching a thin film at moderate temperature after co-implantation.
  63. Tauzin, Aurélie; Faure, Bruce; Garnier, Arnaud, Method of detaching a thin film by melting precipitates.
  64. Yamazaki, Shunpei; Ohtani, Hisashi, Method of fabricating a semiconductor device.
  65. Yamazaki, Shunpei; Ohtani, Hisashi, Method of fabricating a semiconductor device.
  66. Yamazaki, Shunpei; Ohtani, Hisashi, Method of fabricating a semiconductor device.
  67. Yamazaki, Shunpei; Ohtani, Hisashi, Method of fabricating a semiconductor device.
  68. Yamazaki, Shunpei; Ohtani, Hisashi, Method of fabricating a semiconductor device.
  69. Yamazaki, Shunpei; Ohtani, Hisashi, Method of fabricating a semiconductor device.
  70. Yamazaki,Shunpei; Ohtani,Hisashi, Method of fabricating a semiconductor device.
  71. Yamazaki,Shunpei; Ohtani,Hisashi, Method of fabricating a semiconductor device.
  72. Yamazaki,Shunpei; Ohtani,Hisashi, Method of fabricating a semiconductor device.
  73. Faure, Bruce; Letertre, Fabrice; Ghyselen, Bruno, Method of fabricating heteroepitaxial microstructures.
  74. Eriksen, Odd Harald Steen; Guo, Shuwen, Method of manufacture of a semiconductor structure.
  75. Yamazaki, Shunpei, Method of manufacturing a semiconductor device.
  76. Yamazaki, Shunpei, Method of manufacturing a semiconductor device.
  77. Yamazaki, Shunpei, Method of manufacturing a semiconductor device.
  78. Yamazaki, Shunpei, Method of manufacturing a semiconductor device.
  79. Yamazaki, Shunpei, Method of manufacturing a semiconductor device.
  80. Yamazaki, Shunpei, Method of manufacturing a semiconductor device having a gate electrode formed over a silicon oxide insulating layer.
  81. Yamazaki, Shunpei, Method of manufacturing a semiconductor device including thermal oxidation to form an insulating film.
  82. Yamazaki, Shunpei, Method of manufacturing semiconductor device having island-like single crystal semiconductor layer.
  83. Yonehara, Takao; Watanabe, Kunio; Shimada, Tetsuya; Ohmi, Kazuaki; Sakaguchi, Kiyofumi, Method of manufacturing semiconductor wafer method of using and utilizing the same.
  84. Eriksen, Odd Harald Steen; Guo, Shuwen, Method of preparing a semiconductor using ion implantation in a SiC layer.
  85. Deguet, Chrystel; Clavelier, Laurent; Dechamp, Jerome, Method of transferring a thin film onto a support.
  86. Fournel, Franck, Method of transferring a thin layer onto a target substrate having a coefficient of thermal expansion different from that of the thin layer.
  87. Letertre,Fabrice; Ghyselen,Bruno, Methods for fabricating a substrate.
  88. Boussagol, Alice; Faure, Bruce; Ghyselen, Bruno; Letertre, Fabrice; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle, Methods for making substrates and substrates formed therefrom.
  89. Boussagol, Alice; Faure, Bruce; Ghyselen, Bruno; Letertre, Fabrice; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Giséle, Methods for making substrates and substrates formed therefrom.
  90. Gonzalez, Fernando; Beaman, Kevin L.; Moore, John T.; Weimer, Ron, Methods of forming DRAM cells.
  91. Gonzalez,Fernando, Methods of forming semiconductor circuitry.
  92. Gonzalez,Fernando, Methods of forming semiconductor circuitry.
  93. Gonzalez, Fernando, Methods of forming semiconductor circuitry, and semiconductor circuit constructions.
  94. Gonzalez, Fernando, Methods of forming semiconductor constructions.
  95. Gonzalez, Fernando, Methods of forming semiconductor constructions.
  96. Gonzalez,Fernando, Methods of forming semiconductor constructions.
  97. Gonzalez, Fernando, Methods of forming semiconductor logic circuitry, and semiconductor logic circuit constructions.
  98. Malik, Igor J.; Kang, Sien G.; Fuerfanger, Martin; Kirk, Harry; Flat, Ariel; Current, Michael Ira; Ong, Philip James, Non-contact etch annealing of strained layers.
  99. Yamazaki, Shunpei; Ohtani, Hisashi; Koyama, Jun; Fukunaga, Takeshi, Nonvolatile memory and electronic apparatus.
  100. Bryan Michael A. ; Kai James K., Nozzle for cleaving substrates.
  101. Bryan, Michael A.; Kai, James K., Nozzle for cleaving substrates.
  102. Henley Francois J. ; Cheung Nathan W., Pre-semiconductor process implant and post-process film separation.
  103. Henley Francois J. ; Cheung Nathan W., Pre-semiconductor process implant and post-process film separation.
  104. Henley Francois J. ; Cheung Nathan W., Pressurized microbubble thin film separation process using a reusable substrate.
  105. Alexander Y Usenko ; William N. Carr, Process for lift off and transfer of semiconductor devices onto an alien substrate.
  106. Alexander Yuri Usenko, Process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate.
  107. Fukunaga, Takeshi, Process for production of SOI substrate and process for production of semiconductor device.
  108. Fukunaga, Takeshi, Process for production of SOI substrate and process for production of semiconductor device including the selective forming of porous layer.
  109. Moriceau, Hubert; Bruel, Michel; Aspar, Bernard; Maleville, Christophe, Process for the transfer of a thin film.
  110. Moriceau,Hubert; Bruel,Michel; Aspar,Bernard; Maleville,Christophe, Process for the transfer of a thin film.
  111. Moriceau, Hubert; Bruel, Michel; Aspar, Bernard; Maleville, Christophe, Process for the transfer of a thin film comprising an inclusion creation step.
  112. Maleville,Christophe; Neyret,Eric, Process for transfer of a thin layer formed in a substrate with vacancy clusters.
  113. Yonehara, Takao; Ito, Masataka, Process of reclamation of SOI substrate and reproduced substrate.
  114. Henley, Francois J.; Brailove, Adam, Race track configuration and method for wafering silicon solar substrates.
  115. Lutzen, Jorn; Sell, Bernhard, SOI substrate, a semiconductor circuit formed in a SOI substrate, and an associated production method.
  116. Gonzalez, Fernando, Semiconductor circuit constructions.
  117. Gonzalez,Fernando, Semiconductor circuit constructions.
  118. Gonzalez,Fernando, Semiconductor circuitry constructions.
  119. Gonzalez, Fernando, Semiconductor constructions.
  120. Yamazaki, Shunpei, Semiconductor device.
  121. Miyairi, Hidekazu, Semiconductor device comprising semiconductor film with recess.
  122. Yamazaki, Shunpei; Ohtani, Hisashi; Koyama, Jun; Fukunaga, Takeshi, Semiconductor device having buried oxide film.
  123. Iku Shiota JP, Semiconductor substrate and production method thereof.
  124. Shiota Iku,JPX, Semiconductor substrate and production method thereof.
  125. Ohshima Hisayoshi,JPX ; Matsui Masaki,JPX ; Onoda Kunihiro,JPX ; Yamauchi Shoichi,JPX, Semiconductor substrate manufacturing method.
  126. Yamazaki, Shunpei; Koyama, Jun; Miyanaga, Akiharu; Fukunaga, Takeshi, Semiconductor thin film and method of manufacturing the same and semiconductor device and method of manufacturing the same.
  127. Abe, Takao; Matsuura, Takashi; Murota, Junichi, Semiconductor wafer and method for producing the same.
  128. Hebras,Xavier, Semiconductor-on-insulator type heterostructure and method of fabrication.
  129. Ogura Atsushi,JPX, Silicon-on-insulator (SOI) substrate and method of fabricating the same.
  130. Henley, Francois J.; Cheung, Nathan W., Silicon-on-silicon hybrid wafer assembly.
  131. Henley Francois J. ; Cheung Nathan W., Silicon-on-silicon wafer bonding process using a thin film blister-separation method.
  132. Moriceau, Hubert; Aspar, Bernard; Margail, Jacques, Stacked structure and production method thereof.
  133. Bernard Aspar FR; Michel Bruel FR; Eric Jalaguier FR, Structure comprising a thin layer of material made up of conductive zones and insulating zones and a method of manufacturing such a structure.
  134. Bryan Michael A. ; Kai James K., Substrate cleaving tool and method.
  135. Bryan, Michael A.; Kai, James K., Substrate cleaving tool and method.
  136. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  137. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  138. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  139. Brailove, Adam; Liu, Zuqin; Henley, Francois J.; Lamm, Albert J., Techniques for forming thin films by implantation with reduced channeling.
  140. Tauzin,Aur��lie, Thin film splitting method.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트