초록 ▼

A differential transconductance amplifier includes two first NPN transistors, whose bases receive a differential input voltage, and whose collectors are coupled to a first supply voltage through two respective first current sources; two second NPN transistors respectively coupling the emitters of th

A differential transconductance amplifier includes two first NPN transistors, whose bases receive a differential input voltage, and whose collectors are coupled to a first supply voltage through two respective first current sources; two second NPN transistors respectively coupling the emitters of the first transistors to a second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through level shifters; and a resistive means coupled between the emitters of the first transistors. Each level shifter includes a third PNP transistor coupled between the collector of the respective first transistor and the base of the respective second transistor, and whose control terminal receives a constant bias voltage independent of the differential input voltage.

대표청구항 ▼

[ What is claimed is:] [1.] A differential transconductance amplifier comprising:two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage, and having collectors that are coupled to a first supply voltage through two respective first current s

[ What is claimed is:] [1.] A differential transconductance amplifier comprising:two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage, and having collectors that are coupled to a first supply voltage through two respective first current sources;two second bipolar transistors of the first conductivity type, respectively coupling the emitters of the first transistors to a second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through level shifters; anda resistive means coupled between the emitters of the first transistors;wherein each level shifter comprises a third transistor of a second conductivity type, coupled between the collector of the respective first transistor and the base of the respective second transistor, and having a control terminal that receives a constant bias voltage independent of the differential input voltage.