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Circuit member and electric circuit device with the connecting member 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01R-009/09
출원번호 US-0597383 (1996-02-08)
우선권정보 JP-0038865 (1988-02-22)
발명자 / 주소
  • Yoshizawa Tetsuo,JPX
  • Nishida Hideyuki,JPX
  • Imaizumi Masaaki,JPX
  • Ichida Yasuteru,JPX
  • Konishi Masaki,JPX
  • Kondo Hiroshi,JPX
  • Sakaki Takashi,JPX
출원인 / 주소
  • Canon Kabushiki Kaisha, JPX
대리인 / 주소
    Fitzpatrick, Cella, Harper & Scinto
인용정보 피인용 횟수 : 22  인용 특허 : 23

초록

An electrical connecting member for use in an electrical connection for connecting a first electrical circuit component on a side thereof and a second electrical circuit component on another side thereof, said electrical connecting member comprising: a plurality of layers each layer having a plurali

대표청구항

[ What is claimed is:] [1.] An electrical connecting member for use in an electrical connection for connecting a first electrical circuit component on a side thereof and a second electrical circuit component on another side thereof, said electrical connecting member comprising:a plurality of layers

이 특허에 인용된 특허 (23)

  1. Allen Leslie J. (Swindon CA GB2) Cherian Gabe (Fremont CA) Diaz Stephen H. (Los Altos CA), Chip carrier mounting device.
  2. Hirata Osamu (Tokyo JPX), Connecting method.
  3. Burns Carmen D. (San Jose CA), Copper-to-gold thermal compression gang bonding of interconnect leads to semiconductive devices.
  4. Zifcak Mark S. (Putnam CT) Kosa Bruce G. (Woodstock CT), Electrical circuit board interconnect.
  5. Lamp Richard W. (Mendham NJ), Electrical connector employing conductive rectilinear elements.
  6. Lee James C. K. (Los Altos Hills CA) Beck Richard (Cupertino CA) Lee Chune (San Francisco CA) Hu Edward (Sunnyvale CA), Electrical connector for surface mounting and method of making thereof.
  7. Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
  8. Hartmann Michael J. (Calabasas Park CA) Lo Kuang-hsin K. (Houston TX) Nolan Daniel A. (Corning NY), Electrically insulating body.
  9. Takashi Nogami (Tokyo JPX) Masayuki Mitsuhashi (Saitama JPX), Electroconductive rubbery member and elastic connector therewith.
  10. Sado Ryoichi (Saitama JPX), Electronic circuit parts.
  11. Rainal Attilio J. (Convent Station NJ), High-speed, high pin-out LSI chip package.
  12. Wengler Christian (Munich DEX) Vogt Herbert (Munich DEX), Housing for semiconductor device.
  13. Akasaki, Hidehiko, Hybrid integrated circuit device.
  14. Oguri Yasuo (Tokyo JPX) Awata Mitsuru (Tokyo JPX) Endo Hozumi (Fuzisawa JPX), In organic fibers containing fine crystals of AlN and Al2O3 and process for their production.
  15. Ecker Mario E. (Poughkeepsie NY) Olson Leonard T. (Jericho VT), Integrated circuit package.
  16. Hatada Kenzo (Katano JPX) Kitahiro Isamu (Yawata JPX), Method of connecting metal leads with electrodes of semiconductor device and metal lead therefore.
  17. Alonso Oscar (Westminster CA), Method of making conductive elastomer connector.
  18. Kimura Mitsuru (Tokyo JPX) Nakakita Shoji (Tokyo JPX), Method of manufacturing a multichip package with increased adhesive strength.
  19. Osaka Takaaki (Tokyo JPX) Matsui Norio (Tokyo JPX) Susaki Shinichi (Iruma JPX) Egawa Yutaka (Tokyo JPX), Method of manufacturing an interboard connection terminal.
  20. Shinohara Hiroichi (Hitachi JPX) Ushifusa Nobuyuki (Hitachi JPX) Nagayama Kousei (Toukai JPX) Ogihara Satoru (Hitachi JPX), Multilayer ceramic circuit board.
  21. Crepeau Philip C. (San Diego CA), Multilayer printed circuit board.
  22. Kashiro Yoshikazu (Otsu JPX) Matsugasako Kenji (Otsu JPX) Kataoka Shunro (Otsu JPX), Process for producing an anisotropically electroconductive sheet.
  23. Hodge Robin H. (Menlo Park CA) Brodsky Mark A. (Sunnyvale CA), Thermally balanced leadless microelectronic circuit chip carrier.

이 특허를 인용한 특허 (22)

  1. Brown,Jeffrey S., Conductor stack shifting.
  2. Takehara, Hideaki, Connector structure.
  3. Werner Juengling ; Kirk D. Prall ; Ravi Iyer ; Gurtej S. Sandhu ; Guy Blalock, Constructions comprising insulative materials.
  4. George F. Glatts, III, Elastomeric connector and associated method of manufacture.
  5. Brodsky, William Louis; Caletka, David V.; Gaynes, Michael Anthony; Markovich, Voya Rista, Enhanced electrical/mechanical connection for electronic devices.
  6. Takuma Fujimura JP, IC socket for surface-mounting semiconductor device.
  7. Schmidt, Harald, Manufacturing method for an electronic apparatus and electronic apparatus with plastic housing.
  8. Corbin, Jr., John S.; Kostenko, William P.; Loparco, John J.; Notohardjono, Budy D.; Torok, John G., Method and apparatus for providing positive contact force in an electrical assembly.
  9. Raschid J. Bezama ; Govindarajan Natarajan ; Robert W. Pasco, Method and apparatus to manufacture an electronic package with direct wiring pattern.
  10. Yamaguchi,Miho; Suehiro,Ichiro; Asai,Fumiteru; Hotta,Yuji, Method of manufacturing an anisotropic conductive film.
  11. Juengling, Werner; Prall, Kirk D.; Iyer, Ravi; Sandhu, Gurtej S.; Blalock, Guy, Methods of forming materials between conductive electrical components, and insulating materials.
  12. Juengling, Werner; Prall, Kirk D.; Iyer, Ravi; Sandhu, Gurtej S.; Blalock, Guy, Methods of forming materials between conductive electrical components, and insulating materials.
  13. Juengling,Werner; Prall,Kirk D.; Iyer,Ravi; Sandhu,Gurtej S.; Blalock,Guy, Methods of forming materials between conductive electrical components, and insulating materials.
  14. McDaniel, Terrence; Hineman, Max F., Methods of providing an interlevel dielectric layer intermediate different elevation conductive metal layers in the fabrication of integrated circuitry.
  15. Su, Fei; Lan, Meifang; Wei, Hao; Chen, Jiantong; Xiong, Yufang; Su, Yicong, Pin structure and pin connection structure thereof.
  16. Staggert, Scott, Plate with an indicator for discerning among pre-identified probe holes in the plate.
  17. Staggert, Scott, Plate with an indicator for discerning among pre-identified probe holes in the plate.
  18. Anilkumar Chinuprasad Bhatt ; William Louis Brodsky ; Benson Chan, Printed circuit board to module mounting and interconnecting structure and method.
  19. Yamaguchi, Miho; Suehiro, Ichiro; Asai, Fumiteru; Hotta, Yuji, Production method of anisotropic conductive film and anisotropic conductive film produced by this method.
  20. Juengling,Werner; Prall,Kirk D.; Iyer,Ravi; Sandhu,Gurtej S.; Blalock,Guy, Semiconductor constructions.
  21. Kim, Jang-ryeul; Choi, Woo-seong, Semiconductor test board for fine ball pitch ball grid array package.
  22. Bezama Raschid J. ; Natarajan Govindarajan ; Pasco Robert W., Spatial transformation interposer for electronic packaging.

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