초록 ▼

An integrated programmed logic circuit for performing complementary hardware and software based logic functions includes multiple programmed circuit portions. The portion programmed for performing the software based logic functions is programmably configured in a circuit configuration which includes

An integrated programmed logic circuit for performing complementary hardware and software based logic functions includes multiple programmed circuit portions. The portion programmed for performing the software based logic functions is programmably configured in a circuit configuration which includes and changes among multiple operation configuration states in accordance with its execution of its instructions. The portion programmed for performing the hardware based logic functions is programmably configured in a circuit configuration which remains in a single operation configuration state prior to, during and subsequent to its processing of data. Hence, the division of processing, i.e., hardware based and software based, can be designed as most appropriate for the particular application, e.g., more hardware based and less software based processing when speed is more important, and more software based and less hardware based processing when processing flexibility is more important.

대표청구항 ▼

[ What is claimed is:] [1.] An apparatus including an integrated programmed logic circuit, said integrated programmed logic circuit comprising:a first programmed circuit portion configured as a central processing unit in a first programmed circuit configuration to receive and execute a plurality of

[ What is claimed is:] [1.] An apparatus including an integrated programmed logic circuit, said integrated programmed logic circuit comprising:a first programmed circuit portion configured as a central processing unit in a first programmed circuit configuration to receive and execute a plurality of instructions from a fixed, predefined instruction set and in accordance therewith receive and process a first plurality of input data and in accordance therewith provide a first plurality of output data, wherein said first programmed circuit configuration includes and changes among a plurality of operation configuration states in accordance with said execution of said plurality of instructions; anda second programmed circuit portion selectably and fixedly configured in a second programmed circuit configuration to receive and process a second plurality of input data and in accordance therewith provide a second plurality of output data, wherein said second programmed circuit configuration fixedly remains in a selectable single operation configuration state prior to, during and subsequent to said processing of said second plurality of input data, and wherein said selectable single operation configuration state is defined in accordance with a selectable and subsequently fixed subset of instructions from said fixed, predefined instruction set.