초록 ▼

A high conductivity interconnect structure is formed by electroplating or electroless plating of Cu or a Cu-base alloy on a seed layer comprising an alloy of a catalytically active metal, such as Cu, and a refractory metal, such as Ta. The seed layer also functions as a barrier/adhesion layer for th

A high conductivity interconnect structure is formed by electroplating or electroless plating of Cu or a Cu-base alloy on a seed layer comprising an alloy of a catalytically active metal, such as Cu, and a refractory metal, such as Ta. The seed layer also functions as a barrier/adhesion layer for the subsequently plated Cu or Cu-base alloy. Another embodiment comprises initially depositing a refractory metal barrier layer before depositing the seed layer.

대표청구항 ▼

[ What is claimed is:] [1.] A semiconductor device comprising:a semiconductor substrate;a dielectric interlayer formed on a level above the semiconductor substrate, which dielectric interlayer has an upper surface and an opening therein filled with conductive material forming an interconnect pattern

[ What is claimed is:] [1.] A semiconductor device comprising:a semiconductor substrate;a dielectric interlayer formed on a level above the semiconductor substrate, which dielectric interlayer has an upper surface and an opening therein filled with conductive material forming an interconnect pattern, wherein the interconnect pattern comprises:a seed layer comprising an alloy containing a refractory metal and one or more of nickel, cobalt, silver, gold, platinum, rhodium or copper deposited in the opening; anda copper or copper-base alloy electroplated or electrolessly plated on the seed layer in the opening.