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SiC Semiconductor device comprising a pn Junction with a voltage absorbing edge 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/58
출원번호 US-0954165 (1997-10-20)
발명자 / 주소
  • Bakowsky Mietek,SEX
  • Bijlenga Bo,SEX
  • Gustafsson Ulf,SEX
  • Harris Christopher,SEX
  • Savage Susan,SEX
출원인 / 주소
  • Asea Brown Boveri AB, SEX
대리인 / 주소
    Pollock, Vande Sande & Amernick
인용정보 피인용 횟수 : 65  인용 특허 : 12

초록

A semiconductor component, which comprises a pn junction, where both the p-conducting and the n-conducting layers of the pn junction constitute doped silicon carbide layers and where the edge of at least one of the conducting layers of the pn junction, exhibits a stepwise or uniformly decreasing tot

대표청구항

[ We claim:] [1.] A silicon carbide (SiC) semiconductor component comprising a pn junction having;a layer of a first conductivity type, anda layer of a second conductivity type,said layers constituting a pn junction, the edge of at least one of said layers being provided with an edge termination to

이 특허에 인용된 특허 (12)

  1. Anderson Samuel J. (Tempe AZ) Simpson William C. (Mesa AZ) Sullivan Daniel J. (Phoenix AZ), Fast damper diode and method.
  2. Temple Victor A. K. (Clifton Park NY), High breakdown voltage semiconductor device.
  3. Woodall Jerry MacPherson ; Kornegay Kevin Tyrone ; Spencer Michael Gregg, Incandescent light energy conversion with reduced infrared emission.
  4. Ferla Giuseppe (Catania ITX) Musumeci Salvatore (Riposto ITX), Method for the manufacture of semiconductor devices with planar junctions having a variable charge concentration and a v.
  5. Baliga Bantval J. (Raleigh NC), Method of fabricating high voltage silicon carbide MESFETs.
  6. Fang Frank F. (Yorktown Heights NY) Shih Kwang K. (Yorktown Heights NY), Method of fabricating multicolor light emitting diode array utilizing stepped graded epitaxial layers.
  7. Arthur Stephen D. (Scotia NY) Temple Victor A. K. (Jonesville NY), Method of making high breakdown voltage semiconductor device.
  8. Byatt Stephen W. (Manchester GB2), Method of passivating pn-junction in a semiconductor device.
  9. Edmond John A. (Apex NC) Davis Robert F. (Raleigh NC), P-N junction diodes in silicon carbide.
  10. Roggwiller Peter (Riedt-Neerach CHX) Sittig Roland (Umiken CHX), Semiconductor device having a blocking capability in only one direction.
  11. Harris Christopher (Sollentuna SEX) Konstantinov Andrei (Linkoping SEX) Janzen Erik (Borensberg SEX), Semiconductor device having a passivation layer.
  12. Baliga Bantval J. (Raleigh NC) Alok Dev (Raleigh NC), Voltage breakdown resistant monocrystalline silicon carbide semiconductor devices.

이 특허를 인용한 특허 (65)

  1. Zhang, Qingchun; Agarwal, Anant K.; Sudarshan, Tangali S.; Bolotnikov, Alexander, Diffused junction termination structures for silicon carbide devices.
  2. Zhang, Qingchun; Agarwal, Anant K.; Sudarshan, Tangali S.; Bolotnikov, Alexander, Diffused junction termination structures for silicon carbide devices and methods of fabricating silicon carbide devices incorporating same.
  3. Zhang, Qingchun; Jonas, Charlotte; Agarwal, Anant K., Double guard ring edge termination for silicon carbide devices.
  4. Henning, Jason Patrick; Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant; Palmour, John Williams; Allen, Scott, Edge termination structure employing recesses for edge termination elements.
  5. Ryu, Sei-Hyung; Agarwal, Anant K.; Ward, Allan, Edge termination structures for silicon carbide devices.
  6. Van Brunt, Edward Robert; Pala, Vipindas; Cheng, Lin; Agarwal, Anant Kumar, Edge termination technique for high voltage power devices having a negative feature for an improved edge termination structure.
  7. Singh, Ranbir, Epitaxial edge termination for silicon carbide Schottky devices and methods of fabricating silicon carbide devices incorporating same.
  8. Singh, Ranbir, Epitaxial edge termination for silicon carbide Schottky devices and methods of fabricating silicon carbide devices incorporating same.
  9. Ryu, Sei-Hyung; Capell, Doyle Craig; Cheng, Lin; Dhar, Sarit; Jonas, Charlotte; Agarwal, Anant; Palmour, John, Field effect transistor devices with low source resistance.
  10. Ryu, Sei-Hyung; Capell, Doyle Craig; Cheng, Lin; Dhar, Sarit; Jonas, Charlotte; Agarwal, Anant; Palmour, John, Field effect transistor devices with low source resistance.
  11. Zhang, Qingchun, High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability.
  12. Das, Mrinal K.; Lin, Henry; Schupbach, Marcelo; Palmour, John Williams, High current, low switching loss SiC power module.
  13. Das, Mrinal K.; Lin, Henry; Schupbach, Marcelo; Palmour, John Williams, High current, low switching loss SiC power module.
  14. Das, Mrinal K.; Callanan, Robert J.; Lin, Henry; Palmour, John Williams, High performance power module.
  15. Zhang, Qingchun; Ryu, Sei-Hyung; Jonas, Charlotte; Agarwal, Anant K., High power insulated gate bipolar transistors.
  16. Zhang, Qingchun; Ryu, Sei-Hyung; Jonas, Charlotte; Agarwal, Anant K., High power insulated gate bipolar transistors.
  17. Ryu, Sei-Hyung; Zhang, Qingchun, High voltage insulated gate bipolar transistors with minority carrier diverter.
  18. Zhang, Qingchun, Insulated gate bipolar transistors including current suppressing layers.
  19. Zhang, Qingchun, Insulated gate bipolar transistors including current suppressing layers.
  20. Zhang, Qingchun; Ryu, Sei-Hyung, Junction Barrier Schottky diodes with current surge capability.
  21. Henning, Jason; Zhang, Qingchun; Ryu, Sei-Hyung, Junction termination structures including guard ring extensions and methods of fabricating electronic devices incorporating same.
  22. Henning, Jason; Zhang, Qingchun; Ryu, Sei-Hyung, Junction termination structures including guard ring extensions and methods of fabricating electronic devices incorporating same.
  23. Zhang, Qingchun; Agarwal, Anant K., Mesa termination structures for power semiconductor devices and methods of forming power semiconductor devices with mesa termination structures.
  24. Zhang, Qingchun; Agarwal, Anant K., Mesa termination structures for power semiconductor devices including mesa step buffers.
  25. Fu, Qian; Qin, Ce; Yu, Hyun-Yong, Method for forming stair-step structures.
  26. Fu, Qian; Qin, Ce; Yu, Hyun-Yong, Method for forming stair-step structures.
  27. Ryu,Sei Hyung; Agarwal,Anant K., Methods of fabricating silicon carbide devices including multiple floating guard ring edge termination.
  28. Ryu, Sei-Hyung; Agarwal, Anant K., Methods of fabricating silicon carbide devices incorporating multiple floating guard ring edge terminations.
  29. Ryu, Sei-Hyung; Agarwal, Anant K., Methods of fabricating silicon carbide devices incorporating multiple floating guard ring edge terminations.
  30. Van Brunt, Edward Robert; Pala, Vipindas; Cheng, Lin; Agarwal, Anant Kumar, Methods of forming junction termination extension edge terminations for high power semiconductor devices and related semiconductor devices.
  31. Richieri, Giovanni, Molybdenum barrier metal for SiC Schottky diode and process of manufacture.
  32. Richieri, Giovanni, Molybdenum barrier metal for SiC Schottky diode and process of manufacture.
  33. Ryu,Sei Hyung; Agarwal,Anant K., Multiple floating guard ring edge termination for silicon carbide devices.
  34. Henning, Jason Patrick; Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant Kumar; Palmour, John Williams; Allen, Scott, Power module for supporting high current densities.
  35. Henning, Jason Patrick; Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant Kumar; Palmour, John Williams; Allen, Scott, Power module having a switch module for supporting high current densities.
  36. Zhang, Qingchun; Agarwal, Anant K., Power semiconductor devices with mesa structures and buffer layers including mesa steps.
  37. Carta, Rossano; Bellemo, Laura; Richieri, Giovanni; Merlin, Luigi, Power semiconductor switch.
  38. Carta, Rossano; Bellemo, Laura; Richieri, Giovanni; Merlin, Luigi, Power semiconductor switch with plurality of trenches.
  39. Zhang, Qingchun; Richmond, James Theodore; Agarwal, Anant K.; Ryu, Sei-Hyung, Power switching devices having controllable surge current capabilities.
  40. Zhang, Qingchun; Henning, Jason, Recessed termination structures and methods of fabricating electronic devices including recessed termination structures.
  41. Zhang, Qingchun; Henning, Jason, Recessed termination structures and methods of fabricating electronic devices including recessed termination structures.
  42. Henning, Jason Patrick; Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant Kumar; Palmour, John Williams; Allen, Scott, Schottky diode.
  43. Henning, Jason Patrick; Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant Kumar; Palmour, John Williams; Allen, Scott, Schottky diode.
  44. Henning, Jason Patrick; Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant; Palmour, John Williams; Allen, Scott, Schottky diode.
  45. Henning, Jason Patrick; Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant; Palmour, John Williams; Allen, Scott, Schottky diode employing recesses for elements of junction barrier array.
  46. Carta, Rossano; Merlin, Luigi; Bellemo, Laura, Schottky diode with improved surge capability.
  47. Tarui, Yoichiro; Ohtsuka, Ken-ichi; Imaizumi, Masayuki, Semiconductor device and semiconductor device manufacturing method.
  48. Soendker, Erich H.; Hertel, Thomas A.; Saldivar, Horacio, Semiconductor device having an inorganic coating layer applied over a junction termination extension.
  49. Zhang, Qingchun; Ryu, Sei-Hyung; Agarwal, Anant, Semiconductor devices including Schottky diodes having doped regions arranged as islands and methods of fabricating same.
  50. Zhang, Qingchun; Henning, Jason, Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same.
  51. Zhang, Qingchun, Semiconductor devices with heterojunction barrier regions and methods of fabricating same.
  52. Zhang, Qingchun, Semiconductor devices with heterojunction barrier regions and methods of fabricating same.
  53. Zhang, Qingchun, Semiconductor devices with heterojunction barrier regions and methods of fabricating same.
  54. Zhang, Qingchun, Semiconductor devices with heterojunction barrier regions and methods of fabricating same.
  55. Cheng, Lin; Agarwal, Anant K.; O'Loughlin, Michael John; Burk, Jr., Albert Augustus; Palmour, John Williams, SiC devices with high blocking voltage terminated by a negative bevel.
  56. Zhang, Qingchun; Capell, Craig; Agarwal, Anant; Ryu, Sei-Hyung, SiC devices with high blocking voltage terminated by a negative bevel.
  57. Zhang, Qingchun; Capell, Craig; Agarwal, Anant; Ryu, Sei-Hyung, SiC devices with high blocking voltage terminated by a negative bevel.
  58. Richieri, Giovanni, Silicon carbide Schottky diode.
  59. Ryu, Sei-Hyung; Agarwal, Anant K., Silicon carbide junction barrier Schottky diodes with suppressed minority carrier injection.
  60. Richieri, Giovanni, Silicon carbide schottky diode.
  61. Carta, Rossano; Bellemo, Laura; Merlin, Luigi, Solderable top metal for silicon carbide semiconductor devices.
  62. Callanan, Robert J.; Ryu, Sei-Hyung; Zhang, Qingchun, Solid-state pinch off thyristor circuits.
  63. Carta, Rossano; Bellemo, Laura, Termination for SiC trench devices.
  64. Zhang, Qingchun, Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices.
  65. Zhang, Qingchun; Richmond, James Theodore; Callanan, Robert J., Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits.
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