초록 ▼

In a traceback unit for an M-step Viterbi decoder for a convolutionally encoded data stream, each of the traceback stages has a group of K input wires representing K possible candidate states. A bank of K multiplexers selects one of 2.sup.M of the input wires according to M bits of traceback data. T

In a traceback unit for an M-step Viterbi decoder for a convolutionally encoded data stream, each of the traceback stages has a group of K input wires representing K possible candidate states. A bank of K multiplexers selects one of 2.sup.M of the input wires according to M bits of traceback data. The K multiplexer outputs feed a succeeding traceback stage. M groups of K wires carry the traceback data, with each wire being connected to a selection line of each multiplexer. At the output of the traceback unit an identification circuit identifies a subgroup of the K possibilities which has a maximum number of candidate states remaining therein. The arrangement obviates the need for retiming between every traceback stage.

대표청구항 ▼

[ What is claimed is:] [1.] A M-step Viterbi decoder for a convolutionally encoded data stream of the type having a path metric calculator for K states, and a plurality of traceback stages that in a cycle of operation accept a minimum path metric state identification and traceback data from said pat

[ What is claimed is:] [1.] A M-step Viterbi decoder for a convolutionally encoded data stream of the type having a path metric calculator for K states, and a plurality of traceback stages that in a cycle of operation accept a minimum path metric state identification and traceback data from said path metric calculator, wherein the improvement comprises:a plurality of traceback stages, each comprising:a first group of K wires having signals thereon representing candidate states of a stage of operation, said first group defining a plurality of input subgroups;a bank of K selectors each having N inputs mapped to a said input subgroup, each selector further having selection lines accepting M bits of traceback data; and said bank having K outputs connected to a succeeding traceback stage, wherein N=2.sup.M ; andM groups of K wires for carrying traceback data, wherein a predetermined wire of each group of said M groups is operatively mapped to a said selection line of each said selector; anda plurality of retiming registers wherein said plurality of traceback stages exceeds said plurality of retiming registers in number.