초록 ▼

The ON and OFF states of a second device are controlled by a first device through a three-conductor bus. The bus carries data, clock, and enable signals and the second device is in the OFF state when all the signals of the three-conductor bus have an L level. The second device is in the ON state whe

The ON and OFF states of a second device are controlled by a first device through a three-conductor bus. The bus carries data, clock, and enable signals and the second device is in the OFF state when all the signals of the three-conductor bus have an L level. The second device is in the ON state when at least one of the signals has an H level (higher potential than the L level). The enable signal is set to the H level during the data transmission. Otherwise, it carries an L level, while the data or clock signal has an H level. The system obviates an additional housing pin. The operating state information is transmitted relatively rapidly.

대표청구항 ▼

[ We claim:] [1.] A method of controlling, with a first device, operating states of a second device, whereby the first and second devices are connected to each other via a first signal line carrying a clock signal, a second line carrying a digital data signal, and a third line carrying an enable sig

[ We claim:] [1.] A method of controlling, with a first device, operating states of a second device, whereby the first and second devices are connected to each other via a first signal line carrying a clock signal, a second line carrying a digital data signal, and a third line carrying an enable signal, the method which comprises:setting a first operating state in which the second device is switched off, by adjusting the clock signal, the data signal, and the enable signal to a first level with the first device;setting a second operating state in which the second device is switched on, by adjusting at least one of the clock, data and enable signals to a second level having a more positive potential than the first level with the first device; andindicating with the enable signal whether a transmission of data in the data signal and a clock pulse in the clock signal from the first device to the second device is valid.