초록 ▼

A focal plane array comprising two-dimensionally arranged photodetectors, charge transfer devices, transfer gates and a pixel row selection circuit, the focal plane array being operated in such a manner that the signal charges are read out from the photodetectors to vertical charge transfer device i

A focal plane array comprising two-dimensionally arranged photodetectors, charge transfer devices, transfer gates and a pixel row selection circuit, the focal plane array being operated in such a manner that the signal charges are read out from the photodetectors to vertical charge transfer device in one horizontal retrace period and the signal charges stored in the vertical charge transfer device are transferred to outside of a photodetector array region, wherein the pixel row selection circuit comprises a shift register and a switching transistor connected between the shift register and the transfer gates; and by combination of driving the shift resister and driving the switching transistor the horizontal line is selected so that a photodetector from which signal charge is to be read out is selected.

대표청구항 ▼

[ What is claimed is:] [1.] A focal plane array comprising:a plurality of photodetectors arranged in a two-dimensional array;a plurality of vertical charge transfer devices for reading out signal charges stored in each of said photodetectors sequentially;a plurality of transfer gates, each connected

[ What is claimed is:] [1.] A focal plane array comprising:a plurality of photodetectors arranged in a two-dimensional array;a plurality of vertical charge transfer devices for reading out signal charges stored in each of said photodetectors sequentially;a plurality of transfer gates, each connected between one of said photodetectors and one of said vertical charge transfer devices; anda pixel row selection circuit connected to said transfer gates;wherein said signal charges are read out from said photodetectors in at least one horizontal line to one of said vertical charge transfer devices during one horizontal retrace period and said signal charges stored in said vertical charge transfer devices are transferred outside of said two-dimensional array of photodetectors during one horizontal period including said horizontal retrace period; andwherein said pixel row selection circuit includes for each horizontal line a shift register stage and a switching transistor connected between said shift register stage and all of said transfer gates in the horizontal line; said at least one horizontal line being selected by combining driving said shift register stage and driving said switching transistor so that a photodetector from which the signal charge is to be read out is selected.