초록 ▼

A method of controlling switching of a tri-state switching amplifier having two switching legs, two switches in each leg, and a load connected to the junction between the switches of each leg, a power supply and a capacitor connected to the opposite ends of each leg, a first pair of the switches def

A method of controlling switching of a tri-state switching amplifier having two switching legs, two switches in each leg, and a load connected to the junction between the switches of each leg, a power supply and a capacitor connected to the opposite ends of each leg, a first pair of the switches defining an idle state in which current circulates through the load and the first pair of switches, a second pair of the switches defining a Charge state in which the load is connected to the power supply and current through the load increases and a third pair of switches defining a Discharge state in which the load is connected to the power supply and current through the load decreases, the method comprising generating a first PWM signal at the beginning of each pulse of a clock signal; generating a second PWM signal when a binary current error signal changes state; generating, at the beginning of each pulse of the clock signal, a Direction signal which is the inverse of the current error signal; and placing the amplifier in the idle state when the second PWM signal is present and otherwise placing the amplifier in the Charge state for one state of the Direction signal and placing the switches in the Discharge state for the other state of the Direction signal.

대표청구항 ▼

[ We claim:] [1.] A method of controlling switching of a tri-state switching amplifier having two switching legs, two switches in each leg, and a load connected to the junction between the switches of each leg, a power supply and a capacitor connected to the opposite ends of each leg, a first pair o

[ We claim:] [1.] A method of controlling switching of a tri-state switching amplifier having two switching legs, two switches in each leg, and a load connected to the junction between the switches of each leg, a power supply and a capacitor connected to the opposite ends of each leg, a first pair of said switches defining an idle state in which current circulates through said load and said first pair of switches, a second pair of said switches defining a Charge state in which said load is connected to said power supply and current through said load increases and a third pair of switches defining a Discharge state in which said load is connected to said power supply and current through said load decreases, comprising:(a) generating a first PWM signal at the beginning of each pulse of a clock signal;(b) generating a second PWM signal when a binary current error signal changes state;(c) generating, at the beginning of each pulse of said clock signal, a Direction signal which is the inverse of said current error signal; and(d) placing said amplifier in said idle state when said second PWM signal is present and otherwise placing said amplifier in said Charge state for one state of said Direction signal and placing said Amplifier in said Discharge state for the other state of said Direction signal. [6.] A control circuit for controlling switching of a tri-state switching amplifier having two switching legs, two switches in each leg, and a load connected to the junction between the switches of each leg, a power supply and a capacitor connected to the opposite ends of each leg, a first pair of said switches defining an idle state in which current circulates through said load and said first pair of switches, a second pair of said switches defining a Charge state in which said load is connected to said power supply and current through said load increases and a third pair of switches defining a Discharge state in which said load is connected to said power supply and current through said load decreases, comprising:(a) means for generating a first PWM signal at the beginning of each pulse of a clock signal;(b) means for generating a second PWM signal when a binary current error signal changes state;(c) means for generating, at the beginning of each pulse of said clock signal, a Direction signal which is the inverse of said current error signal; and(d) switch driver means responsive to said PWM and Direction signals for placing said amplifier in said idle state when said second PWM signal is present and otherwise placing said amplifier in said Charge state for one state of said Direction signal and placing said switches in said Discharge state for the other state of said Direction signal.