초록 ▼

A circuit arrangement for use in a semiconductor integrated circuit tester for measuring leakage current supplied from a pin of a semiconductor integrated circuit device under test (DUT) to a programmed voltage level includes a voltage source having an output terminal, a feedback mechanism connected

A circuit arrangement for use in a semiconductor integrated circuit tester for measuring leakage current supplied from a pin of a semiconductor integrated circuit device under test (DUT) to a programmed voltage level includes a voltage source having an output terminal, a feedback mechanism connected between the DUT pin and the voltage source for controlling the voltage source to force the DUT pin to the programmed voltage level, a capacitor connected between the output terminal of the voltage source and the DUT pin, and a circuit for measuring voltage developed across the capacitor.

대표청구항 ▼

[ I claim:] [1.] A circuit arrangement for use in a semiconductor integrated circuit tester for measuring leakage current supplied from a pin of a semiconductor integrated circuit device under test (DUT) to a programmed voltage level, comprising:a voltage force means having an output terminal,a feed

[ I claim:] [1.] A circuit arrangement for use in a semiconductor integrated circuit tester for measuring leakage current supplied from a pin of a semiconductor integrated circuit device under test (DUT) to a programmed voltage level, comprising:a voltage force means having an output terminal,a feedback means connected between the DUT pin and the voltage force means for controlling the voltage force means to force the DUT pin to said programmed voltage level,a differential integrating capacitor connected between the output terminal of the voltage force means and the DUT pin, anda means for measuring voltage developed across the capacitor.