$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Structure for a thin film multilayer capacitor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01G-040/05
  • H01G-042/28
출원번호 US-0031235 (1998-02-26)
발명자 / 주소
  • Farooq Mukta S.
  • Farooq Shaji
  • Hamel Harvey C.
  • Knickerbocker John U.
  • Rita Robert A.
  • Stoller Herbert I.
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    DeLio & Peterson, LLCCurcio
인용정보 피인용 횟수 : 42  인용 특허 : 10

초록

An electronic component structure is proposed, wherein an interposer thin film capacitor structure is employed between an active electronic component and a multilayer circuit card. A method for making the interposer thin film capacitor is also proposed. In order to eliminate fatal electrical shorts

대표청구항

[ Thus, having described the invention, what is claimed is:] [1.] An electronic component structure comprising:an electronic component with conductive leads;a multilayer substrate with a top surface, said substrate comprising a plurality of layers having therein metalized circuitry, and interconnect

이 특허에 인용된 특허 (10)

  1. Mazzochette Joseph B. (Cherry Hill NJ), AC coupled termination.
  2. Beppu Henry (San Diego CA) Kusuhara Toshi (San Diego CA) Nomura Aki (San Diego CA), Ceramic-glass integrated circuit package with integral ground and power planes.
  3. Pitetti Raymond C. (Wescosville PA) Rutkiewicz John (Center Valley PA), Fabrication of film circuits having a thick film crossunder and a thin film capacitor.
  4. Saito Masayuki (Yokohama JPX) Suzuki Haruko (Yokosuka JPX) Oodaira Hirosi (Chigasaki JPX), Method for producing a capacitor with precise capacitance.
  5. Cohen Marvin S. (22 Lancaster Dr. Framingham MA 01701) Lopes Marcio A. (10 Second St. Framingham MA 01701), Method for removing electrical components from printed circuit boards.
  6. Behn Reinhard (Munich DEX) Wittmann Rudolf (Heidenheim DEX), Method for the manufacture of plasma-polymer multilayer capacitors.
  7. Ralph Loren E. (Citrus Heights CA), Mixer constructed from thick film balanced line structure.
  8. Anderson Wayne A. (Hamburg NY) Jia Quanxi (Los Alamos NM) Yi Junsin (Amherst NY) Chang Lin-Huang (Tonawanda NY), Nanocrystalline layer thin film capacitors.
  9. Pepin John G. (Newark DE), Thick film conductor composition.
  10. Kola Ratnaji Rao ; Tai King Lien, Thin film tantalum oxide capacitors and resulting product.

이 특허를 인용한 특허 (42)

  1. Otsuka, Jun; Sato, Manabu, Capacitor, and capacitor manufacturing process.
  2. Ogawa, Kouki; Kodera, Eiji, Capacitor-built-in type printed wiring substrate, printed wiring substrate, and capacitor.
  3. Ogawa,Kouki; Kodera,Eiji, Capacitor-built-in type printed wiring substrate, printed wiring substrate, and capacitor.
  4. Lin, Mou-Shiung, Chip structure with a passive device and method for forming the same.
  5. Matsumoto, Tsuyoshi; Mizuno, Yoshihiro; Mi, Xiaoyu; Okuda, Hisao; Ueda, Satoshi, Electronic component.
  6. He,Jiangqi; Sun,Ping; Kim,Hyunjun; Zeng,Xiang Yin, Extended thin film capacitor (TFC).
  7. He,Jiangqi; Sun,Ping; Kim,Hyunjun; Zeng,Xiang Yin, Extended thin film capacitor (TFC).
  8. Mosley, Larry Eugene, High performance capacitor.
  9. Mosley, Larry Eugene, High performance capacitor.
  10. Lin, Mou-Shiung, High performance system-on-chip inductor using post passivation process.
  11. Lin, Mou Shiung, High performance system-on-chip passive device using post passivation process.
  12. Lin, Mou-Shing, High performance system-on-chip using post passivation process.
  13. Lin, Mou-Shiung, High performance system-on-chip using post passivation process.
  14. Tanaka, Junichi; Takubo, Hiroyuki; Abe, Shigenobu, IC module, and wireless information-storage medium and wireless information-transmitting/receiving apparatus including the IC module.
  15. Tanaka, Junichi; Takubo, Hiroyuki; Abe, Shigenobu, IC module, and wireless information-storage medium and wireless information-transmitting/receiving apparatus including the IC wireless.
  16. Tang, John J.; Zeng, Xiang Yin; He, Jiangqi; Hai, Ding, Integrated capacitors in package-level structures, processes of making same, and systems containing same.
  17. Tang, John J.; Zeng, Xiang Yin; He, Jiangqi; Hai, Ding, Integrated capacitors in package-level structures, processes of making same, and systems containing same.
  18. Casper, Michael D.; Mraz, William B., Integrated thin film capacitor/inductor/interconnect system and method.
  19. Casper, Michael D.; Mraz, William B., Integrated thin film capacitor/inductor/interconnect system and method.
  20. Casper,Michael D.; Mraz,William B., Integrated thin film capacitor/inductor/interconnect system and method.
  21. Casper,Michael D.; Mraz,William B., Integrated thin film capacitor/inductor/interconnect system and method.
  22. Casper,Michael D.; Mraz,William B., Integrated thin film capacitor/inductor/interconnect system and method.
  23. Casper,Michael D.; Mraz,William B., Lange coupler system and method.
  24. Devey, William John, Method and structure for reduction of impedance using decoupling capacitor.
  25. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  26. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  27. Sohn,Seung Hyun; Chung,Yul Kyo; Jin,Hyun Ju; Park,Eun Tae, Method of fabricating printed circuit board having embedded multi-layer passive devices.
  28. Mosley,Larry Eugene, Methods for forming a high performance capacitor.
  29. Mosley, Larry Eugene, Multi-layer chip capacitor.
  30. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection process and structures.
  31. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection structures.
  32. Higashi, Mitsutoshi; Sakaguchi, Hideaki; Koike, Hiroko, Substrate-embedded capacitor, production method thereof, and circuit board.
  33. Schaper, Leonard W., Surface applied passives.
  34. Mukta S. Farooq ; John U. Knickerbocker ; Srinivasa S. N. Reddy ; Robert A. Rita ; Roy Yu, Thin film capacitor on ceramic.
  35. Kurihara,Kazuaki; Shioga,Takeshi; Baniecki,John David; Ishii,Masatoshi, Thin-film capacitor and method for fabricating the same, electronic device and circuit board.
  36. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  37. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  38. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  39. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  40. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  41. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  42. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로