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A two-dimensional infrared focal plane array of temperature detecting units is provided with the temperature detecting units being arranged for every pixel in a two-dimensional arrangement on a semiconductor substrate. Each temperature detecting unit is formed integrally with readout circuitry. Each

A two-dimensional infrared focal plane array of temperature detecting units is provided with the temperature detecting units being arranged for every pixel in a two-dimensional arrangement on a semiconductor substrate. Each temperature detecting unit is formed integrally with readout circuitry. Each temperature detecting unit further has a temperature detecting portion which is supported by support legs made of a high thermal resistance material to reduce heat flow to the semiconductor substrate. Each temperature detecting unit also has a temperature detecting element with an infrared ray absorbing portion which is spliced by at least one splicing pillar with the temperature detecting element.

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[ What is claimed is:] [1.] A two-dimensional infrared focal plane array comprising temperature detecting units arranged for every pixel of a corresponding two-dimensional arrangement on a semiconductor substrate, each of said temperature detecting units being formed integrally with signal readout c

[ What is claimed is:] [1.] A two-dimensional infrared focal plane array comprising temperature detecting units arranged for every pixel of a corresponding two-dimensional arrangement on a semiconductor substrate, each of said temperature detecting units being formed integrally with signal readout circuitry configured to provide an output signal indicating a change in incident infrared rays detected as a temperature change by an associated temperature detecting unit,wherein each of said temperature detecting units includes a temperature detecting portion for every said pixel, each said temperature detecting portion being supported by support legs on said semiconductor substrate, each support leg comprising a high thermal resistance material reducing heat flow to said semiconductor substrate,further wherein each said temperature detecting portion includes a temperature detecting element and a corresponding infrared ray absorbing portion, each infrared ray absorbing portion being spliced by at least one splicing pillar to each corresponding temperature detecting element and having an area substantially equal to an area of each pixel arranged in said two-dimensional arrangement except for a divisional margin space.