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Virtual logic system for reconfigurable hardware 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-019/173
  • H03K-019/177
  • G06F-007/38
출원번호 US-0010000 (1998-01-21)
발명자 / 주소
  • Abramovici Miron
출원인 / 주소
  • Lucent Technologies Inc.
인용정보 피인용 횟수 : 152  인용 특허 : 10

초록 ▼

A set of reconfigurable hardware includes a number of field programmable gate arrays (FPGAs), a controller referred to as a page manager, and a RAM-based local memory. In an illustrative embodiment, each of the FPGAs is suitable for implementing any one of a number of different portions of a logic c

대표청구항 ▼

[ What is claimed is:] [1.] A method of reconfiguring a set of hardware to implement different portions of a circuit, the method comprising the steps of:partitioning a model of the circuit into a plurality of pages, each of the pages corresponding to one of the portions of the circuit; andcontrollin

이 특허에 인용된 특허 (10)

  1. Zlotnick Fredrick (Scottsdale AZ), Circuit and method of configuring a field programmable gate array.
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  2. Trimberger Stephen M., Configurable electronic device which is compatible with a configuration bitstream of a prior generation configurable ele.
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  3. Ohmori, Kenji, Dynamic gate array whereby an assembly of gates is simulated by logic operations on variables selected according to the gates.
    상세보기
  4. Mange Daniel (Saint-Sulpice CHX) Marchal Pierre (Lausanne CHX) Piguet Christian (Neuchtel CHX) Sanchez Eduardo (Saint-Sulpice CHX), Electronic system organised as an array of cells.
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  5. Chatter Mukesh, High performance self modifying on-the-fly alterable logic FPGA, architecture and method.
    상세보기
  6. Gissel David W. (Colorado Springs CO), High throughput FPGA control interface.
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  7. Erickson Charles R. (Fremont CA) Hung Lawrence Cy-Wei (Los Gatos CA), Method and structure for loading data into several IC devices.
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  8. Pickett Scott K. (San Jose CA) Luich Thomas M. (Campbell CA) Swift ; IV Arthur L. (Welches OR), Multiple page programmable logic architecture.
    상세보기
  9. Lytle Craig S. (Mountain View CA) Faria Donald F. (San Jose CA), Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory.
    상세보기
  10. Leeds Kenneth E. ; Erickson Charles R., System comprising field programmable gate array and intelligent memory.
    상세보기

이 특허를 인용한 특허 (152)

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