초록 ▼

A scrambled data transmission is descrambled by communicating encrypted program information and authentication information between an external storage device and block buffers of a secure circuit. The program information is communicated in block chains to reduce the overhead of the authentication in

A scrambled data transmission is descrambled by communicating encrypted program information and authentication information between an external storage device and block buffers of a secure circuit. The program information is communicated in block chains to reduce the overhead of the authentication information. The program information is communicated a block at a time, or even a chain at a time, and stored temporarily in block buffers and a cache, then provided to a CPU to be processed. The blocks may be stored in the external storage device according to a scrambled address signal, and the bytes, blocks, and chains may be further randomly re-ordered and communicated to the block buffers non-sequentially to obfuscate the processing sequence of the program information. Program information may be also be communicated from the secure circuit to the external memory. The program information need not be encrypted but only authenticated for security.

대표청구항 ▼

[ What is claimed is:] [1.] An apparatus for processing program information, comprising:a secure circuit including a central processing unit (CPU) and at least one block buffer for storing at least one block of the program information;an external storage device which is adapted to store the program

[ What is claimed is:] [1.] An apparatus for processing program information, comprising:a secure circuit including a central processing unit (CPU) and at least one block buffer for storing at least one block of the program information;an external storage device which is adapted to store the program information external to said secure circuit;a first communication path which is adapted to communicate a group of blocks of said program information from said external storage device to said at least one block buffer in a first block chain; anda second communication path which is adapted to communicate the program information from the at least one block buffer to the CPU for processing therein; wherein:the first block chain comprises authentication data derived from the group of blocks of program information; andsaid secure circuit comprises an authentication circuit that is responsive to said at least one block buffer for processing the first block chain to verify the authentication data thereof prior to the program information being communicated to the CPU.