Failover system for a DASD storage controller reconfiguring a first processor, a bridge, a second host adaptor, and a second device adaptor upon a second processor failure
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-013/14
G06F-011/00
출원번호
US-0026622
(1998-02-20)
발명자
/ 주소
Beardsley Brent C.
Kalos Matthew Joseph
Knowlden Ronald Robert
출원인 / 주소
International Business Machines Corporation
대리인 / 주소
Victor
인용정보
피인용 횟수 :
99인용 특허 :
16
초록▼
Disclosed is a storage controller for interfacing between a plurality of host systems and direct access storage devices (DASDs). The storage controller includes a bridge, a first host adaptor, and a first device adaptor that are configured to communicate with a first processor. A first DASD is linke
Disclosed is a storage controller for interfacing between a plurality of host systems and direct access storage devices (DASDs). The storage controller includes a bridge, a first host adaptor, and a first device adaptor that are configured to communicate with a first processor. A first DASD is linked to the first device adaptor. The bridge interfaces the first processor, the first host adaptor, and the first device adaptor. The storage controller further includes a second host adaptor and a second device adaptor that are configured to communicate with a second processor. A second DASD is linked to the second device adaptor. The bridge further interfaces the second processor, the second host adaptor, and the second device adaptor. After configuration, an input/output (I/O) request from at least one of the host systems is directed to the first DASD via the first host adaptor, the first processor, and the first device adaptor. An I/O request from at least one of the host systems to the second DASD is directed via the second host adaptor, the second processor, and the second device adaptor. Upon determining that the second processor has failed, the first processor configures the second host adaptor and second device adaptor to communicate with the first processor. After configuration in response to determining that the second processor has failed, an I/O request from at least one of the host systems to the second DASD is transferred via the second host adaptor, the first processor, and the second device adaptor.
대표청구항▼
[ What is claimed is:] [1.] A method for a storage controller to interface between a plurality of host systems and direct access storage devices (DASDs), comprising the steps of:(a) configuring a bridge, a first host adaptor, and a first device adaptor to communicate with a first processor, wherein
[ What is claimed is:] [1.] A method for a storage controller to interface between a plurality of host systems and direct access storage devices (DASDs), comprising the steps of:(a) configuring a bridge, a first host adaptor, and a first device adaptor to communicate with a first processor, wherein a first DASD is linked to the first device adaptor, and wherein the bridge interfaces the first processor, the first host adaptor, and the first device adaptor;(b) configuring the bridge, a second host adaptor, and a second device adaptor to communicate with a second processor, wherein a second DASD is linked to the second device adaptor, and wherein the bridge interfaces the second processor, the second host adaptor, and the second device adaptor;(c) directing an input/output (I/O) request from at least one of the host systems to the first DASD via the first host adaptor, the first processor, and the first device adaptor;(d) directing an I/O request from at least one of the host systems to the second DASD via the second host adaptor, the second processor, and the second device adaptor;(e) determining whether the second processor has failed; and(f) configuring, with the first processor, the bridge, the second host adaptor, and second device adaptor to communicate with the first processor, wherein after configuration in response to determining that the second processor has failed, an I/O request from at least one of the host systems to the second DASD is transferred via the second host adaptor, the first processor, and the second device adaptor.
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이 특허에 인용된 특허 (16)
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