초록 ▼

A circuit for applying a testing data to a DUT for testing the DUT comprises a buffer memory for receiving and buffering a redundancy-free information as information which is substantially free of redundancy but might also comprise some redundant information to a certain extent, a redundancy memory

A circuit for applying a testing data to a DUT for testing the DUT comprises a buffer memory for receiving and buffering a redundancy-free information as information which is substantially free of redundancy but might also comprise some redundant information to a certain extent, a redundancy memory for storing a redundancy information as information comprising a certain amount of redundancy, and a processing unit for generating the testing data by processing the redundancy-free information in association with the redundancy information. Further, includes a method for applying a testing data to the DUT for testing the DUT includes the steps of receiving and buffering the redundancy-free information, fetching in accordance with the received redundancy-free information the redundancy information, and generating the testing data by processing the redundancy-free information in association with the redundancy information.

대표청구항 ▼

[ What is claimed is:] [1.] A decompression circuit for applying testing data to a device under test (DUT) for testing the DUT, comprising:a redundancy memory with a plurality of entries, each entry comprising a respective vector sequence and coded length of the vector sequence;a buffer memory for r

[ What is claimed is:] [1.] A decompression circuit for applying testing data to a device under test (DUT) for testing the DUT, comprising:a redundancy memory with a plurality of entries, each entry comprising a respective vector sequence and coded length of the vector sequence;a buffer memory for receiving and buffering one or more data words, each comprising one or more addresses of entries stored in the redundancy memory;a processing unit for generating testing data by processing respective vector sequences and coded lengths thereof retrieved from said redundancy memory, in association with the one or more data words received from the buffer memory, whereby the redundancy memory behaves like a dictionary.