초록 ▼

The present invention relates to a CDMA system, which, in part, uses serial and parallel interference cancellation methods to overcome disadvantages of a method of detecting single user, and comprises a feedback loops for providing reproduced signals to respective inputs of detectors, and a means fo

The present invention relates to a CDMA system, which, in part, uses serial and parallel interference cancellation methods to overcome disadvantages of a method of detecting single user, and comprises a feedback loops for providing reproduced signals to respective inputs of detectors, and a means for controlling an operation for the detectors to attribute to interference cancellation process. The detectors to contribute to interference cancellation process can be also selected group by group. It is used to switch off only detectors contributing to interference cancellation process in progress and detectors contributing to previous interference cancellation, providing a adaptive serial and parallel mixed interference cancellation method for increasing performance and capacity of the CDMA system.

대표청구항 ▼

[ What is claimed is:] [1.] An adaptive serial and parallel mixed interference cancellation method, comprising the steps of:storing a received signal in a buffer via a low pass filter;receiving a buffer signal output from said buffer at a plurality of detectors;selecting arbitrary ones of decision s

[ What is claimed is:] [1.] An adaptive serial and parallel mixed interference cancellation method, comprising the steps of:storing a received signal in a buffer via a low pass filter;receiving a buffer signal output from said buffer at a plurality of detectors;selecting arbitrary ones of decision signals output from the plurality of detectors in a selection controller;closing a switch corresponding to a selected signal selected in said selection controller and transmitting said selected signal with a (+1,-1) binary data signal through a signum function to a processor;recovering said (+1,-1) binary data signal at said processor;reproducing a baseband signal of the recovered signal during said step of; andfeeding the reproduced baseband signal to an address via feedback loops and adding said reproduced baseband signal at an adder to remove the reproduced baseband signal from the received signal to thereby produce new signals.