초록 ▼

A semiconductor device (10) includes a bump structure that reduces stress and thus reduces passivation cracking and silicon cratering that can be a failure mode in semiconductor manufacturing. The stress is reduced by forming a polyimide layer (16) over a passivation layer (14). The polyimide layer

A semiconductor device (10) includes a bump structure that reduces stress and thus reduces passivation cracking and silicon cratering that can be a failure mode in semiconductor manufacturing. The stress is reduced by forming a polyimide layer (16) over a passivation layer (14). The polyimide layer (16) is extended beyond an edge of the passivation layer (14) over the metal pad (12). A solder bump (22) is composed of a eutectic material and is formed on the metal pad (12) and on the polyimide layer (16). The polyimide layer (16) prevents the solder bump (22) from contacting the passivation layer (14). This is useful for electroless or electroplating technology and may also be useful in other types of bump forming technology such as C4 and E3.

대표청구항 ▼

[ What is claimed is:] [1.] A method for forming a solder bump structure on a metal bonding pad of a semiconductor device, the method comprising the steps of:forming a passivation layer to isolate the metal bonding pad of the semiconductor device, the passivation layer overlapping an edge of the met

[ What is claimed is:] [1.] A method for forming a solder bump structure on a metal bonding pad of a semiconductor device, the method comprising the steps of:forming a passivation layer to isolate the metal bonding pad of the semiconductor device, the passivation layer overlapping an edge of the metal bonding pad;forming a polyimide layer covering the passivation layer and extending over the passivation layer towards a center region of the metal bonding pad;forming an under bump metal layer over the center region of the metal bonding pad; andforming a solder bump on the under bump metal layer.