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Electronic devices with strontium barrier film and process for making same 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/28
  • H01L-021/4763
출원번호 US-0215127 (1998-12-18)
발명자 / 주소
  • Stumborg Michael F.
  • Santiago Francisco
  • Chu Tak Kin
  • Boulais Kevin A.
출원인 / 주소
  • The United States of America as represented by the Secretary of the Navy
대리인 / 주소
    Bechtel, Esq.
인용정보 피인용 횟수 : 34  인용 특허 : 31

초록

A semiconductor device having a barrier film comprising an extremely thin film formed of one or more monolayers each comprised of a two-dimensional array of metal atoms. In one exemplary aspect, the barrier film is used for preventing the diffusion of atoms of another material, such as a copper cond

대표청구항

[ What is claimed is:] [1.] A process for making a semiconductor device comprising the steps of:forming, on a surface of a substrate material, a barrier film having a thickness less than approximately 20 .ANG. and including a monolayer of strontium atoms immediately adjacent said surface of the subs

이 특허에 인용된 특허 (31)

  1. Lim Sheldon C. P. (Sunnyvale CA) Chu Stanley C. (Cupertino CA), Barrier layer enhancement in metallization scheme for semiconductor device fabrication.
  2. Himpsel Franz J. (Mt. Kisco NY), Epitaxy of high TC superconductors on silicon.
  3. Nakamura Takashi (Kyoto JPX), Ferroelectric field effect transistor with fluoride buffer and IV-VI ferroelectric.
  4. Eizenberg Moshe (Kiryat-Ata NJ ILX) Murarka Shyam P. (New Providence NJ), Forming low-resistance contact to silicon.
  5. Childs Timothy T. (Minnetonka MN) Nohava Thomas (Apple Valley MN), GaAs heterostructure metal-insulator-semiconductor integrated circuit technology.
  6. Heremans Joseph P. (Troy MI) Partin Dale L. (Sterling Heights MI), Hot electron transistors.
  7. Mitchell Douglas G. ; Carney Francis J. ; Woolsey Eric J., Interconnect system and method of fabrication.
  8. Tsang Won-Tien (New Providence NJ), MOS Devices.
  9. Choi Kyeong K. (Ichonshi KRX), Method for fabricating a diffusion barrier metal layer in a semiconductor device.
  10. Kim Jun K. (Seoul KRX) Lee Kyung I. (Seoul KRX), Method for forming a copper metal wiring with aluminum containing oxidation barrier.
  11. Cho Chih-Chen, Method for the growth of epitaxial metal-insulator-metal-semiconductor structures.
  12. Summerfelt Scott R. (Dallas TX) Reid Jason (Pasadena CA) Nicolet Marc (Pasadena CA) Kolawa Elzbieta (Sierra Madre CA), Method of forming conductive noble-metal-insulator-alloy barrier layer for high-dielectric-constant material electrodes.
  13. Nishioka Yasushiro (Tsukuba TX JPX) Summerfelt Scott R. (Dallas TX) Park Kyung-Ho (Tsukuba JPX) Bhattacharya Pijush (Midnapur INX), Method of forming high-dielectric-constant material electrodes comprising sidewall spacers.
  14. Choi Kyeong Keun (Ichonkun KRX), Method of forming metal interconnection layer of semiconductor device.
  15. Inoue Yoji,JPX ; Tanaka Katsu,JPX ; Okamoto Shinji,JPX ; Kobayashi Kikuo,JPX, Method of manufacturing ternary compound thin films.
  16. Morar John F. (Mahopac NY) Tromp Rudolf M. (Mount Kisco NY), Methods for forming epitaxial self-aligned calcium silicide contacts and structures.
  17. Milano, Raymond A., Multilayer modulation doped heterostructure charge coupled device.
  18. Huang Yuan-Chang (Hsin-Chu TWX) Chang Kuang-Hui (Hsin-Chu TWX), Post contact layer etch back process which prevents precipitate formation.
  19. McKee Rodney A. (Kingston TN) Walker Frederick J. (Oak Ridge TN), Process for depositing an oxide epitaxially onto a silicon substrate and structures prepared with the process.
  20. McKee Rodney A. (Kingston TN) Walker Frederick J. (Oak Ridge TN), Process for depositing epitaxial alkaline earth oxide onto a substrate and structures prepared with the process.
  21. Sun Shi-Chung (Taipei TWX) Chiu Hien-Tien (Taipei TWX) Tsai Ming-Hsing (Chiayi TWX), Process for fabricating tantalum nitride diffusion barrier for copper matallization.
  22. Gelatos Avgerinos V. (Austin TX) Fiordalice Robert W. (Austin TX), Process for forming copper interconnect structure.
  23. Santiago Francisco (Elkridge MD) Chu Tak K. (Bethesda MD) Stumborg Michael F. (Bethesda MD), Process for forming epitaxial BaF2 on GaAs.
  24. Santiago Francisco (Elkridge MD) Chu Tak-Kin (Bethesda MD) Stumborg Michael (Rockville MD), Process for forming epitaxial BaF2 on GaAs.
  25. Schacham-Diamand Yosef ; Dubin Valery M. ; Ting Chiu H. ; Zhao Bin ; Vasudev Prahalad K. ; Desilva Melvin, Protected encapsulation of catalytic layer for electroless copper interconnect.
  26. Clark Marion D. (11725 Montana Ave. Los Angeles CA 90049) Anderson C. Lawrence (4409 Henley Ct. Westlake Village CA 91360), Schottky barrier charge coupled device (CCD) manufacture.
  27. Chin Maw-Rong (Huntington Beach CA) Warren Gary (Huntington Beach CA) Liao Kuan-Yang (Laguna Niguel CA), Self-aligned contact diffusion barrier method.
  28. Koubuchi Yasushi (Hitachi JPX) Onuki Jin (Hitachi JPX) Koizumi Masahiro (Hitachi JPX), Semiconductor device.
  29. Lee Sang-in (Suwon KRX), Semiconductor device and method for manufacturing the same.
  30. Cho Chih-Chen (Richardson TX), Semiconductor-on-insulator structure and method for producing same.
  31. Dubin Valery M. (Cupertino CA) Schacham-Diamand Yosi (Ithaca NY) Zhao Bin (Irvine CA) Vasudev Prahalad K. (Austin TX) Ting Chiu H. (Saratoga CA), Use of cobalt tungsten phosphide as a barrier material for copper metallization.

이 특허를 인용한 특허 (34)

  1. Raaijmakers,Ivo; Haukka,Suvi P.; Saanila,Yille A.; Soininen,Pekka J.; Elers,Kai Erik; Granneman,Ernst H. A., Conformal lining layers for damascene metallization.
  2. Bauer, Matthias; Thomas, Shawn G., Cyclical epitaxial deposition and etch.
  3. Todd, Michael A., Deposition of amorphous silicon-containing films.
  4. Michael F. Stumborg ; Francisco Santiago ; Tak Kin Chu ; Kevin A. Boulais, Electronic devices with a barrier film and process for making same.
  5. Tak Kin Chu ; Francisco Santiago ; Kevin A. Boulais, Electronic devices with diffusion barrier and process for making same.
  6. Bauer, Matthias, Epitaxial deposition of doped semiconductor materials.
  7. Bauer, Matthias, High throughput cyclical epitaxial deposition and etch process.
  8. Alessandra Satta BE; Karen Maex BE; Kai-Erik Elers FI; Ville Antero Saanila FI; Pekka Juha Soininen FI; Suvi P. Haukka FI, Method for bottomless deposition of barrier layers in integrated circuit metallization schemes.
  9. Satta, Alessandra; Maex, Karen; Elers, Kai-Erik; Saanila, Ville Antero; Soininen, Pekka Juha; Haukka, Suvi P., Method for bottomless deposition of barrier layers in integrated circuit metallization schemes.
  10. Satta, Alessandra; Maex, Karen; Elers, Kai-Erik; Saanila, Ville Antero; Soininen, Pekka Juha; Haukka, Suvi P., Method for bottomless deposition of barrier layers in integrated circuit metallization schemes.
  11. Raaijmakers, Ivo; Soininen, Pekka T.; Granneman, Ernst H. A.; Haukka, Suvi P., Method for controlling conformality with alternating layer deposition.
  12. Sun,Grace; Zubkov,Vladimir; Barth,William K.; Lakshminarayanan,Sethuraman; Sun,Sey Shing; Suvkhanov,Agajan; Cui,Hao, Method for creating barrier layers for copper diffusion.
  13. Zubkov, Vladimir; Aronowitz, Sheldon, Method for creating barriers for copper diffusion.
  14. Zubkov,Vladimir; Aronowitz,Sheldon, Method for creating barriers for copper diffusion.
  15. Van Nooten, Sebastian E.; Maes, Jan Willem; Marcus, Steven; Wilk, Glen; Räisänen, Petri; Elers, Kai-Erik, Method of forming non-conformal layers.
  16. Raaijmakers, Ivo; Haukka, Suvi P.; Saanila, Ville A.; Soininen, Pekka J.; Elers, Kai-Erik; Granneman, Ernst H. A., Method of making conformal lining layers for damascene metallization.
  17. Bauer, Matthias, Methods of depositing electrically active doped crystalline Si-containing films.
  18. Bauer, Matthias; Weeks, Keith Doran; Tomasini, Pierre; Cody, Nyles, Methods of making substitutionally carbon-doped crystalline Si-containing materials by chemical vapor deposition.
  19. Bauer,Matthias; Weeks,Keith Doran; Tomasini,Pierre; Cody,Nyles, Methods of making substitutionally carbon-doped crystalline Si-containing materials by chemical vapor deposition.
  20. Todd, Michael A.; Hawkins, Mark, Process for deposition of semiconductor films.
  21. Chu, Tak Kin; Santiago, Francisco; Boulais, Kevin A., Process for making electronic devices having a monolayer diffusion barrier.
  22. Ivo Raaijmakers NL; Pekka T. Soininen FI; Ernst H. A. Granneman NL; Suvi P. Haukka FI, Protective layers prior to alternating layer deposition.
  23. Raaijmakers, Ivo; Soininen, Pekka T.; Granneman, Ernst H. A.; Haukka, Suvi P., Protective layers prior to alternating layer deposition.
  24. Raaijmakers, Ivo; Soininen, Pekka T.; Granneman, Ernst; Haukka, Suvi; Elers, Kai-Erik; Tuominen, Marko; Sprey, Hessel; Terhorst, Herbert; Hendriks, Menso, Sealing porous structures.
  25. Bauer, Matthias; Arena, Chantal; Bertram, Ronald; Tomasini, Pierre; Cody, Nyles; Brabant, Paul; Italiano, Joseph; Jacobson, Paul; Weeks, Keith Doran, Selective deposition of silicon-containing films.
  26. Bauer, Matthias; Weeks, Keith Doran, Selective epitaxial formation of semiconductive films.
  27. Bauer, Matthias; Weeks, Keith Doran, Selective epitaxial formation of semiconductor films.
  28. Bauer, Mathias, Separate injection of reactive species in selective formation of films.
  29. Bauer, Matthias, Separate injection of reactive species in selective formation of films.
  30. Thomas, Shawn; Tomasini, Pierre, Stressor for engineered strain on channel.
  31. Bauer, Matthias, Structure comprises an As-deposited doped single crystalline Si-containing film.
  32. Aggarwal, Ravinder; Conner, Rand; Disanto, John; Alexander, James A., Substrate reactor with adjustable injectors for mixing gases within reaction chamber.
  33. Jain, Ajaykumar R., System and method for manufacturing thick and thin film devices using a donee layer cleaved from a crystalline donor.
  34. Todd, Michael A.; Raaijmakers, Ivo, Thin films and methods of making them.
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