초록 ▼

A method for efficiently fabricating a via plug having high aspect ratio within an insulating layer with a diffusion barrier layer effectively surrounding the via plug. The method includes the steps of depositing a via photoresist layer over a first metal line of a first conductive material and etch

A method for efficiently fabricating a via plug having high aspect ratio within an insulating layer with a diffusion barrier layer effectively surrounding the via plug. The method includes the steps of depositing a via photoresist layer over a first metal line of a first conductive material and etching a via hole in the via photoresist layer. The first conductive material of the first metal line is exposed at a bottom wall of the via hole. A via plug of a second conductive material is deposited into the via hole, and the via plug makes a conductive path with the first metal line. The via photoresist layer is then removed such that any side wall of the via plug is exposed. A first diffusion barrier layer is then deposited onto any exposed surface of the second conductive material of the via plug. A via insulating layer is then spin-coated to surround the via plug and a trench insulating layer is also deposited over the via insulating layer. A trench is then etched over the via plug having the first diffusion barrier layer, and the via plug with the first diffusion barrier layer is exposed as part of a bottom wall of the trench. A second diffusion barrier layer is then deposited onto the walls of the trench, and a third conductive material is deposited into the trench to form a second metal line. The second metal line makes a conductive path with the second conductive material of the via plug. Thus, the present invention avoids the prior art method of depositing a diffusion barrier layer into the via hole within a via insulating layer before filling the via hole with the via plug. With the present invention, a via plug with high aspect ratio may be efficiently formed with the diffusion barrier layer effectively surrounding the via plug.

대표청구항 ▼

[ We claim:] [1.] A method for fabricating a via plug within an integrated circuit wafer, the method comprising the steps of:A. depositing a via photoresist layer over a first metal line of a first conductive material;B. etching a via hole in said via photoresist layer, wherein said first conductive

[ We claim:] [1.] A method for fabricating a via plug within an integrated circuit wafer, the method comprising the steps of:A. depositing a via photoresist layer over a first metal line of a first conductive material;B. etching a via hole in said via photoresist layer, wherein said first conductive material of said first metal line is exposed at a bottom wall of said via hole;C. depositing a via plug of a second conductive material into said via hole, wherein said via plug is conductively coupled to said first metal line;D. removing said via photoresist layer such that any side wall of said via plug is exposed; andE. selectively depositing a first diffusion barrier layer onto any exposed surface of said second conductive material of said via plug.