초록 ▼

In a process for manufacturing a thin film transistor having a semiconductor layer constituting source and drain regions and a channel forming region, by the semiconductor layer being made thinner in the source and drain regions than in the channel forming region a structure is realized wherein, at

In a process for manufacturing a thin film transistor having a semiconductor layer constituting source and drain regions and a channel forming region, by the semiconductor layer being made thinner in the source and drain regions than in the channel forming region a structure is realized wherein, at the boundary between the source region and the channel forming region and the boundary between the drain region and the channel forming region, portions where electric field concentrations occur are displaced from the portion where a channel is formed. By reducing the OFF current (the leak current) without also reducing the ON current, a high mutual conductance is realized.

대표청구항 ▼

[ What is claimed is:] [1.] A transistor comprising:a semiconductor layer provided on a flat insulating surface and comprising a source region, a drain region, and a protrusion provided between said source region and said drain region, said protrusion comprising a channel;a gate electrode provided a

[ What is claimed is:] [1.] A transistor comprising:a semiconductor layer provided on a flat insulating surface and comprising a source region, a drain region, and a protrusion provided between said source region and said drain region, said protrusion comprising a channel;a gate electrode provided adjacent to said channel with a gate insulating layer therebetween; andat least one electrode connected to at least one of said source region and said drain region,wherein one of sides of said protrusion is substantially aligned with a junction between said drain region and said channel, andwherein said protrusion is provided adjacent to said gate electrode and has a side substantially vertical to said flat insulating surface.