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Top metal and passivation procedures for copper damascene structures 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0425312 (1999-10-25)
발명자 / 주소
  • Jang Syun-Ming,TWX
출원인 / 주소
  • Taiwan Semiconductor Manufacturing Company, TWX
대리인 / 주소
    Saile
인용정보 피인용 횟수 : 41  인용 특허 : 24

초록

A process sequence used to form a gold wire bond, to an extended aluminum based structure, which in turn overlays a copper damascene structure, has been developed. The process features the creation of an extended aluminum based structure, used to accept the gold wire bond, thus reducing the risk of

대표청구항

[ What is claimed is:] [1.] A method of forming a wire bond to an underlying metal structure, on a semiconductor substrate, comprising the steps of:forming a damascene metal structure, in a first insulator layer, on a semiconductor substrate, resulting in a smooth, top surface topography, comprised

이 특허에 인용된 특허 (24)

  1. Cheung Robin W. ; Lin Ming-Ren, Advanced copper interconnect system that is compatible with existing IC wire bonding technology.
  2. Zheng Jiazhen,SGX ; Chan Lap, Antifuse structure and method for manufacturing it.
  3. McTeer Allen, Copper diffusion barrier, aluminum wetting layer and improved methods for filling openings in silicon substrates with c.
  4. Ma Shawming ; Theil Jeremy A., Elevated image sensor array which includes isolation between the image sensors and a unique interconnection.
  5. Okamoto Shigeru,JPX, Embedded electroconductive layer and method for formation thereof.
  6. Teong Su-Ping (Singapore SGX), Etch stop for copper damascene process.
  7. Wollesen Donald L. (Saratoga CA), High conductivity interconnection line.
  8. Ema Taiji (Kawasaki JPX), High speed DRAM with novel wiring structure.
  9. Motsiff William Thomas ; Geffken Robert Michael ; Uttecht Ronald Robert, Integrated pad and fuse structure for planar copper metallurgy.
  10. Huang Richard J. (Milpitas CA) Cheung Robin W. (Cupertino CA) Rakkhit Rajat (Milpitas CA) Lee Raymond T. (Sunnyvale CA), Landing pad technology doubled up as a local interconnect and borderless contact for deep sub-half micrometer IC applica.
  11. Huang Richard J. (Milpitas CA) Cheung Robin W. (Cupertino CA) Rakkhit Rajat (Milpitas CA) Lee Raymond T. (Sunnyvale CA), Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC applicati.
  12. Wollesen Donald L., Low capacitance interconnection.
  13. Nguyen Tue ; Hsu Sheng Teng, Low resistance contact between integrated circuit metal levels and method for same.
  14. Lur Water (Taipei TWX), Metal layout pattern for improved passivation layer coverage.
  15. Lee Chung-Kuang (Hsin-chu TWX) Hsu Jung-Hsien (Hsin-chu TWX) Tseng Pin-Nan (Hsin-chu TWX), Method for making metal contacts and interconnections concurrently on semiconductor integrated circuits.
  16. Venkatraman Ramnath (Austin TX), Method of alloying an interconnect structure with copper.
  17. Geffken Robert Michael ; Motsiff William Thomas ; Uttecht Ronald R., Personalization structure for semiconductor devices.
  18. Liu Yowjuang W. (San Jose CA) Chang Kuang-Yeh (Los Gatos CA), Reverse damascene via structures.
  19. Iijima Yoshitaka (Suwa JPX) Seki Shigeaki (Suwa JPX), Semiconductor device.
  20. Nakamura Toru (Tokyo JPX) Toriyama Keiji (Tokyo JPX), Semiconductor device.
  21. Kasai Naoki,JPX, Semiconductor device capable of easily filling contact conductor plug in contact hole.
  22. Ashida Tsutomu (Nara JPX), Semiconductor device with a pair of dummy electrodes below an inner lead.
  23. Owada Nobuo (Ohme JPX) Oogaya Kaoru (Ohme JPX) Kobayashi Tohru (Iruma JPX) Kawaji Mikinori (Hino JPX), Semiconductor integrated circuit device in which a semiconductor chip is mounted with solder bumps for mounting to a wir.
  24. Hussein Makarem ; Lee Kevin J. ; Sivakumar Sam, Single step electroplating process for interconnect via fill and metal line patterning.

이 특허를 인용한 특허 (41)

  1. Paik,Young J., Adjusting manufacturing process control parameter using updated process threshold derived from uncontrollable error.
  2. Schwarm,Alexander T., Automated design and execution of experiments with integrated model creation for semiconductor manufacturing tools.
  3. Usui, Ryosuke; Mizuhara, Hideki; Igarashi, Yusuke; Sakamoto, Noriaki, Circuit device manufacturing method.
  4. Usui,Ryosuke; Mizuhara,Hideki; Igarashi,Yusuke; Sakamoto,Noriaki, Circuit device manufacturing method.
  5. Usui,Ryosuke; Mizuhara,Hideki; Igarashi,Yusuke; Sakamoto,Noriaki, Circuit device manufacturing method including mounting circuit elements on a conductive foil, forming separation grooves in the foil, and etching the rear of the foil.
  6. Arackaparambil,John F.; Chi,Tom; Chow,Billy; D'Souza,Patrick M.; Hawkins,Parris; Huang,Charles; Jensen,Jett; Krishnamurthy,Badri N.; Kulkarni,Pradeep M.; Kulkarni,Prakash M.; Lin,Wen Fong; Mohan,Shan, Computer integrated manufacturing techniques.
  7. Arackaparambil,John F.; Chi,Tom; Chow,Billy; D'Souza,Patrick M.; Hawkins,Parris; Huang,Charles; Jensen,Jett; Krishnamurthy,Badri N.; Kulkarni,Pradeep M.; Kulkarni,Prakash M.; Lin,Wen Fong; Mohan,Shan, Computer integrated manufacturing techniques.
  8. Paik, Young Joseph, Control of chemical mechanical polishing pad conditioner directional velocity to improve pad life.
  9. Paik,Young Joseph, Control of chemical mechanical polishing pad conditioner directional velocity to improve pad life.
  10. Burrell,Lloyd G.; Cooney, III,Edward E.; Gambino,Jeffrey P.; Heidenreich, III,John E.; Lee,Hyun Koo; Levy,Mark D.; Li,Baozhen; Luce,Stephen E.; McDevitt,Thomas L.; Stamper,Anthony K.; Wong,Kwong Hon;, Copper to aluminum interlayer interconnect using stud and via liner.
  11. Ward, Nicholas A.; Danielson, Richard; Corey, David B., Dynamic control of wafer processing paths in semiconductor manufacturing processes.
  12. Shanmugasundram, Arulkumar P.; Schwarm, Alexander T., Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing.
  13. Shanmugasundram, Arulkumar P.; Schwarm, Alexander T., Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing.
  14. Shanmugasundram, Arulkumar P.; Schwarm, Alexander T., Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing.
  15. Paik, Young Jeen, Dynamic offset and feedback threshold.
  16. Chi, Yueh-Shian; Hawkins, Parris C M; Huang, Charles Q., Dynamic subject information generation in message services of distributed object systems.
  17. Chi,Yueh shian T.; Hawkins,Parris C. M.; Huang,Charles Q., Dynamic subject information generation in message services of distributed object systems in a semiconductor assembly line facility.
  18. Krishnamurthy,Badri N.; Hawkins,Parris C. M., Experiment management system, method and medium.
  19. Shanmugasundram, Arulkumar P.; Schwarm, Alexander T.; Prabhu, Gopalakrishna B., Feedback control of a chemical mechanical polishing device providing manipulation of removal rate profiles.
  20. Shanmugasundram,Arulkumar P.; Schwarm,Alexander T.; Prabhu,Gopalakrishna B., Feedback control of a chemical mechanical polishing device providing manipulation of removal rate profiles.
  21. Shanmugasundram, Arulkumar P.; Schwarm, Alexander T.; Iliopoulos, Ilias; Parkhomovsky, Alexander; Seamons, Martin J., Feedback control of plasma-enhanced chemical vapor deposition processes.
  22. Paik,Young Joseph, Feedforward and feedback control for conditioning of chemical mechanical polishing pad.
  23. Shanmugasundram,Arulkumar P.; Schwarm,Alexander T., Integrating tool, module, and fab level control.
  24. Reiss,Terry P.; Shanmugasundram,Arulkumar P.; Schwarm,Alexander T., Integration of fault detection with run-to-run control.
  25. Wang, Chung-Yu; Huang, Chender; Tsao, Pei-Haw; Chen, Ken, Metal patterned structure for SiN surface adhesion enhancement.
  26. Schwarm,Alexander T.; Shanmugasundram,Arulkumar P.; Pan,Rong; Hernandez,Manuel; Mohammad,Amna, Method of feedback control of sub-atmospheric chemical vapor deposition processes.
  27. Chie-Ming Yang TW; Hui-Chi Lin TW; Jun-Yang Lai TW; Jiann-Liang Liou TW; Cheng-Yeh Shih TW, Method to improve adhesion of molding compound by providing an oxygen rich film over the top surface of a passivation layer.
  28. Kokotov,Yuri; Entin,Efim; Seror,Jacques; Fisher,Yossi; Sarel,Shalomo; Shanmugasundram,Arulkumar P.; Schwarm,Alexander T.; Paik,Young Jeen, Method, system and medium for controlling manufacture process having multivariate input parameters.
  29. Al Bayati,Amir; Adibi,Babak; Foad,Majeed; Somekh,Sasson, Method, system and medium for controlling semiconductor wafer processes using critical dimension measurements.
  30. Shanmugasundram,Arulkumar P.; Armer,Helen; Schwarm,Alexander T., Method, system and medium for process control for the matching of tools, chambers and/or other semiconductor-related entities.
  31. Schwarm,Alexander T.; Shanmugasundram,Arulkumar P.; Seror,Jacques; Kokotov,Yuri; Entin,Efim, Method, system, and medium for handling misrepresentative metrology data within an advanced process control system.
  32. Mukherjee, Shyama; Levert, Joseph; DeBear, Donald, Planarizers for spin etch planarization of electronic components.
  33. Paik,Young J., Process control by distinguishing a white noise component of a process variance.
  34. Paik,Young Jeen, Process control by distinguishing a white noise component of a process variance.
  35. Sun, Sey-Shing; Pallinti, Jayanthi; Vijay, Dilip; Bhatt, Hemanshu; Ying, Hong; Kao, Chiyi; Burke, Peter, Reduction of macro level stresses in copper/low-K wafers.
  36. Padhi,Deenesh; Gandikota,Srinivas; Naik,Mehul; Parikh,Suketu A.; Dixit,Girish A., Selective metal encapsulation schemes.
  37. Carson Bryan C. ; Moore Scott E., Semiconductor die de-processing using a die holder and chemical mechanical polishing.
  38. Carson, Bryan C.; Moore, Scott E., Semiconductor die de-processing using a die holder and chemical mechanical polishing.
  39. Daubenspeck, Timothy Harrison; Gambino, Jeffrey Peter; Muzzy, Christopher David; Sauter, Wolfgang, Substrate anchor structure and method.
  40. Schwarm,Alexander T., System, method, and medium for monitoring performance of an advanced process control system.
  41. Surana,Rahul; Zutshi,Ajoy, Technique for process-qualifying a semiconductor manufacturing tool using metrology data.
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