초록 ▼

A logic system is presented including multiple configurable logic blocks (CLBs) implementing a state machine having multiple states, each state being associated with one or more logic functions and one or more possible next states. Each CLB includes programmable logic circuitry, and is configurable

A logic system is presented including multiple configurable logic blocks (CLBs) implementing a state machine having multiple states, each state being associated with one or more logic functions and one or more possible next states. Each CLB includes programmable logic circuitry, and is configurable to implement the logic functions required in any given state. A complex state machine may be implemented using only 1+s CLBs, where s is the maximum number of next states of any state, thereby using a minimum amount of configurable logic. The logic system also includes a memory unit, a control unit coupled to the memory unit and to each of the CLBs, and an interface unit coupled to the control unit and to each of the CLBs. The memory unit stores configuration data required to configure the CLBs and state transition information. The control unit generates and stores current state information. Following programming, a single "active" CLB implements the logic functions required in the current state. The remaining CLBs are "inactive". While in the current state, the control unit uses state transition information from the memory unit and current state information to determine the possible next states. The control unit then retrieves configuration data from the memory unit corresponding to each of the possible next states, and programs one inactive CLB for each possible next state. The interface unit routes input signals to, and output signals from, the active CLB in response to a control signal from the control unit.

대표청구항 ▼

[ What is claimed is:] [1.] A logic system for implementing a state machine, wherein the state machine comprises a plurality of states, and wherein each of the plurality of states has one or more possible next states which may be reached by a single state transition, the logic system comprising:a co

[ What is claimed is:] [1.] A logic system for implementing a state machine, wherein the state machine comprises a plurality of states, and wherein each of the plurality of states has one or more possible next states which may be reached by a single state transition, the logic system comprising:a control unit configured to produce configuration signals; anda plurality of configurable logic blocks (CLBs) coupled to the control unit, wherein each of the plurality of CLBs is configurable to perform one or more selected logic functions in response to the configuration signals; rein when the state machine is in a given state:one of the plurality of CLBs is "active", wherein the active CLB is coupled to receive a plurality of input signals and performs one or more logic functions associated with the state in order to produce a plurality of output signals; andthe control unit provides configuration signals to a number of the remaining CLBs equal to the number of possible next states in order to configure each of the number of the remaining CLBs to perform one or more logic functions associated with one of the one or more possible next states.